From: Kim Phillips <kim.phillips@amd.com>
To: Arnaldo Carvalho de Melo <acme@redhat.com>, kim.phillips@amd.com
Cc: "Peter Zijlstra" <peterz@infradead.org>,
"Ingo Molnar" <mingo@redhat.com>,
"Arnaldo Carvalho de Melo" <acme@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
"Jiri Olsa" <jolsa@redhat.com>,
"Namhyung Kim" <namhyung@kernel.org>,
"Vijay Thakkar" <vijaythakkar@me.com>,
"Andi Kleen" <ak@linux.intel.com>,
"John Garry" <john.garry@huawei.com>,
"Kan Liang" <kan.liang@linux.intel.com>,
"Yunfeng Ye" <yeyunfeng@huawei.com>,
"Jin Yao" <yao.jin@linux.intel.com>,
"Martin Liška" <mliska@suse.cz>, "Borislav Petkov" <bp@suse.de>,
"Jon Grimm" <jon.grimm@amd.com>,
"Martin Jambor" <mjambor@suse.cz>,
"Michael Petlan" <mpetlan@redhat.com>,
"William Cohen" <wcohen@redhat.com>,
"Stephane Eranian" <eranian@google.com>,
"Ian Rogers" <irogers@google.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: [PATCH 1/4] perf vendor events amd: Add L2 Prefetch events for zen1
Date: Tue, 1 Sep 2020 17:09:41 -0500 [thread overview]
Message-ID: <20200901220944.277505-1-kim.phillips@amd.com> (raw)
Later revisions of PPRs that post-date the original Family 17h events
submission patch add these events.
Specifically, they were not in this 2017 revision of the F17h PPR:
Processor Programming Reference (PPR) for AMD Family 17h Model 01h, Revision B1 Processors Rev 1.14 - April 15, 2017
But e.g., are included in this 2019 version of the PPR:
Processor Programming Reference (PPR) for AMD Family 17h Model 18h, Revision B1 Processors Rev. 3.14 - Sep 26, 2019
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Fixes: 98c07a8f74f8 ("perf vendor events amd: perf PMU events for AMD Family 17h")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Vijay Thakkar <vijaythakkar@me.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Yunfeng Ye <yeyunfeng@huawei.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: "Martin Liška" <mliska@suse.cz>
Cc: Borislav Petkov <bp@suse.de>
Cc: Jon Grimm <jon.grimm@amd.com>
Cc: Martin Jambor <mjambor@suse.cz>
Cc: Michael Petlan <mpetlan@redhat.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Ian Rogers <irogers@google.com>
Cc: linux-perf-users@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
---
.../pmu-events/arch/x86/amdzen1/cache.json | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/tools/perf/pmu-events/arch/x86/amdzen1/cache.json b/tools/perf/pmu-events/arch/x86/amdzen1/cache.json
index 404d4c569c01..695ed3ffa3a6 100644
--- a/tools/perf/pmu-events/arch/x86/amdzen1/cache.json
+++ b/tools/perf/pmu-events/arch/x86/amdzen1/cache.json
@@ -249,6 +249,24 @@
"BriefDescription": "Cycles with fill pending from L2. Total cycles spent with one or more fill requests in flight from L2.",
"UMask": "0x1"
},
+ {
+ "EventName": "l2_pf_hit_l2",
+ "EventCode": "0x70",
+ "BriefDescription": "L2 prefetch hit in L2.",
+ "UMask": "0xff"
+ },
+ {
+ "EventName": "l2_pf_miss_l2_hit_l3",
+ "EventCode": "0x71",
+ "BriefDescription": "L2 prefetcher hits in L3. Counts all L2 prefetches accepted by the L2 pipeline which miss the L2 cache and hit the L3.",
+ "UMask": "0xff"
+ },
+ {
+ "EventName": "l2_pf_miss_l2_l3",
+ "EventCode": "0x72",
+ "BriefDescription": "L2 prefetcher misses in L3. All L2 prefetches accepted by the L2 pipeline which miss the L2 and the L3 caches.",
+ "UMask": "0xff"
+ },
{
"EventName": "l3_request_g1.caching_l3_cache_accesses",
"EventCode": "0x01",
--
2.27.0
next reply other threads:[~2020-09-01 22:10 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-01 22:09 Kim Phillips [this message]
2020-09-01 22:09 ` [PATCH 2/4] perf vendor events amd: Add ITLB Instruction Fetch Hits event for zen1 Kim Phillips
2020-09-03 6:03 ` Ian Rogers
2020-09-04 19:19 ` Arnaldo Carvalho de Melo
2020-09-01 22:09 ` [PATCH 3/4] perf vendor events amd: Add recommended events Kim Phillips
2020-09-03 6:19 ` Ian Rogers
2020-09-03 18:26 ` Kim Phillips
2020-09-04 5:48 ` Ian Rogers
2020-09-04 19:28 ` Arnaldo Carvalho de Melo
2020-09-01 22:09 ` [PATCH 4/4] perf vendor events amd: Enable Family 19h users by matching Zen2 events Kim Phillips
2020-09-03 6:20 ` Ian Rogers
2020-09-04 19:33 ` Arnaldo Carvalho de Melo
2020-09-03 5:40 ` [PATCH 1/4] perf vendor events amd: Add L2 Prefetch events for zen1 Ian Rogers
2020-09-04 19:18 ` Arnaldo Carvalho de Melo
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