From: <kostap@marvell.com>
To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Cc: <linux@armlinux.org.uk>, <robh+dt@kernel.org>,
<sebastian.hesselbarth@gmail.com>, <gregory.clement@bootlin.com>,
<andrew@lunn.ch>, <mw@semihalf.com>, <jaz@semihalf.com>,
<nadavh@marvell.com>, <stefanc@marvell.com>, <bpeled@marvell.com>,
"Konstantin Porotchkin" <kostap@marvell.com>
Subject: [PATCH v2 02/12] dts: mvebu: Update A8K AP806/AP807 SDHCI settings
Date: Wed, 10 Feb 2021 16:09:39 +0200 [thread overview]
Message-ID: <20210210140949.32515-3-kostap@marvell.com> (raw)
In-Reply-To: <20210210140949.32515-1-kostap@marvell.com>
From: Konstantin Porotchkin <kostap@marvell.com>
Select the AP SDHCI PHY slow mode for AP806 die only (move it
from armada-ap80x.dtsi to armada-ap806.dtsi). This will allow
running AP807 based devices at HS400 speed.
Remove Ap SDHCI slow mode property from MacchiatoBin board DTS
since it is already selected on the SoC level.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi | 5 -----
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 1 -
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
index 73733b4126e2..69653de998e2 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
@@ -109,11 +109,6 @@
&ap_sdhci0 {
bus-width = <8>;
- /*
- * Not stable in HS modes - phy needs "more calibration", so add
- * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
- */
- marvell,xenon-phy-slow-mode;
no-1-8-v;
no-sd;
no-sdio;
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 866628679ac7..828cd539173b 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -28,3 +28,15 @@
reg = <0x278 0xa30>;
};
};
+
+&ap_sdhci0 {
+ /*
+ * SoC based on AP806 revision A0, A1 and A2 should use slow mode
+ * settings for Ap SDHCI due to HW Erratum HWE-7296210
+ * AP806 revesion B0 and later has this erratum fixed and the slow
+ * mode could be removed in board DTS:
+ * /delete-property/marvell,xenon-phy-slow-mode;
+ * Starting from B0 revision, the AP SDHCI can run with HS400 timing.
+ */
+ marvell,xenon-phy-slow-mode;
+};
diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
index 12e477f1aeb9..edd6131a0587 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
@@ -257,7 +257,6 @@
clock-names = "core";
clocks = <&ap_clk 4>;
dma-coherent;
- marvell,xenon-phy-slow-mode;
status = "disabled";
};
--
2.17.1
next prev parent reply other threads:[~2021-02-10 14:11 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-10 14:09 [PATCH v2 00/12] Device tree fixes for Armada family kostap
2021-02-10 14:09 ` [PATCH v2 01/12] fix: arm64: dts: replace wrong regulator on ap emmc kostap
2021-02-11 10:52 ` Russell King - ARM Linux admin
2021-02-11 13:57 ` [EXT] " Kostya Porotchkin
2021-02-11 14:02 ` Russell King - ARM Linux admin
2021-02-10 14:09 ` kostap [this message]
2021-02-11 10:42 ` [PATCH v2 02/12] dts: mvebu: Update A8K AP806/AP807 SDHCI settings Russell King - ARM Linux admin
2021-02-10 14:09 ` [PATCH v2 03/12] dts: mvebu: Add pin control definitions for SDIO interafce kostap
2021-02-10 14:09 ` [PATCH v2 04/12] fix: dts: a8k: Add CP eMMC regulator and update device parameters kostap
2021-02-10 14:09 ` [PATCH v2 05/12] arm64: dts: marvell: armada-3720-db: add comphy references kostap
2021-02-11 23:31 ` Pali Rohár
2021-02-10 14:09 ` [PATCH v2 06/12] arm64: dts: marvell: armada-3270-espressobin: " kostap
2021-02-11 23:28 ` Pali Rohár
2021-02-10 14:09 ` [PATCH v2 07/12] fix: ARM64: dts: cp110: Switch to 8-bit ECC NAND setting kostap
2021-02-10 14:09 ` [PATCH v2 08/12] arm64: dts: marvell: armada-3720-db: add eeprom description kostap
2021-02-10 14:09 ` [PATCH v2 09/12] dts: a3700: enable dma coherence kostap
2021-02-10 14:09 ` [PATCH v2 10/12] dts: marvell: add 2 eeprom properties to A8K DB device tree kostap
2021-02-10 14:09 ` [PATCH v2 11/12] dts: marvell: add 2 eeprom properties to A7K " kostap
2021-02-10 14:09 ` [PATCH v2 12/12] arm64: dts: fix the Armada 8040 DB AP SDHCI bus width kostap
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210210140949.32515-3-kostap@marvell.com \
--to=kostap@marvell.com \
--cc=andrew@lunn.ch \
--cc=bpeled@marvell.com \
--cc=devicetree@vger.kernel.org \
--cc=gregory.clement@bootlin.com \
--cc=jaz@semihalf.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=mw@semihalf.com \
--cc=nadavh@marvell.com \
--cc=robh+dt@kernel.org \
--cc=sebastian.hesselbarth@gmail.com \
--cc=stefanc@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).