From: Ling Pei Lee <pei.lee.ling@intel.com>
To: Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Ong Boon Leong <boon.leong.ong@intel.com>,
Voon Weifeng <weifeng.voon@intel.com>,
Wong Vee Khee <vee.khee.wong@linux.intel.com>,
Wong Vee Khee <vee.khee.wong@intel.com>,
Tan Tee Min <tee.min.tan@intel.com>,
Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>,
netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: pei.lee.ling@intel.com
Subject: [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume()
Date: Mon, 21 Jun 2021 17:45:35 +0800 [thread overview]
Message-ID: <20210621094536.387442-4-pei.lee.ling@intel.com> (raw)
In-Reply-To: <20210621094536.387442-1-pei.lee.ling@intel.com>
From: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
After PHY received a magic packet, the PHY WOL event will be
triggered then PHY WOL event interrupt will be disarmed.
Ethtool settings will remain with WOL enabled after a S3/S4
suspend resume cycle as expected. Hence,the driver should
reconfigure the PHY settings to reenable/disable WOL
depending on the ethtool WOL settings in the resume flow.
Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@intel.com>
Co-developed-by: Ling Pei Lee <pei.lee.ling@intel.com>
Signed-off-by: Ling Pei Lee <pei.lee.ling@intel.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index a3b79ddcf08e..cd96e4d7a22e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7246,6 +7246,16 @@ int stmmac_resume(struct device *dev)
phylink_start(priv->phylink);
/* We may have called phylink_speed_down before */
phylink_speed_up(priv->phylink);
+ /* Reconfigure PHY WOL if the WOL is enabled in ethtool,
+ * so that subsequent WOL still can be triggered.
+ */
+ if (!priv->plat->pmt) {
+ struct ethtool_wolinfo phy_wol = { .cmd = ETHTOOL_GWOL };
+
+ phylink_ethtool_get_wol(priv->phylink, &phy_wol);
+ if (phy_wol.wolopts)
+ phylink_ethtool_set_wol(priv->phylink, &phy_wol);
+ }
rtnl_unlock();
}
--
2.25.1
next prev parent reply other threads:[~2021-06-21 9:46 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 9:45 [PATCH net-next V1 0/4] Add option to enable PHY WOL with PMT enabled Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 1/4] net: stmmac: " Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 2/4] stmmac: intel: Enable PHY WOL option in EHL Ling Pei Lee
2021-06-21 9:45 ` Ling Pei Lee [this message]
2021-06-21 13:05 ` [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume() Andrew Lunn
2021-06-23 10:06 ` Voon, Weifeng
2021-06-23 19:36 ` Andrew Lunn
2021-06-24 10:07 ` Voon, Weifeng
2021-06-24 13:40 ` Andrew Lunn
2021-06-25 15:58 ` Voon, Weifeng
2021-06-25 16:35 ` Andrew Lunn
2021-06-28 7:48 ` Voon, Weifeng
2021-06-25 16:48 ` Russell King (Oracle)
2021-06-28 7:54 ` Voon, Weifeng
2021-06-21 9:45 ` [PATCH net-next V1 4/4] stmmac: intel: set PCI_D3hot in suspend Ling Pei Lee
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