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From: Sean Christopherson <seanjc@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Peter Gonda <pgonda@google.com>,
	Brijesh Singh <brijesh.singh@amd.com>,
	Tom Lendacky <thomas.lendacky@amd.com>
Subject: [PATCH 5/7] KVM: VMX: Refactor 32-bit PSE PT creation to avoid using MMU macro
Date: Wed, 23 Jun 2021 16:05:50 -0700	[thread overview]
Message-ID: <20210623230552.4027702-6-seanjc@google.com> (raw)
In-Reply-To: <20210623230552.4027702-1-seanjc@google.com>

Compute the number of PTEs to be filled for the 32-bit PSE page tables
using the page size and the size of each entry.  While using the MMU's
PT32_ENT_PER_PAGE macro is arguably better in isolation, removing VMX's
usage will allow a future namespacing cleanup to move the guest page
table macros into paging_tmpl.h, out of the reach of code that isn't
directly related to shadow paging.

No functional change intended.

Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/kvm/vmx/vmx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index ab6f682645d7..f6fa922ca6e3 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -3584,7 +3584,7 @@ static int init_rmode_identity_map(struct kvm *kvm)
 	}
 
 	/* Set up identity-mapping pagetable for EPT in real mode */
-	for (i = 0; i < PT32_ENT_PER_PAGE; i++) {
+	for (i = 0; i < (PAGE_SIZE / sizeof(tmp)); i++) {
 		tmp = (i << 22) + (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |
 			_PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_PSE);
 		if (__copy_to_user(uaddr + i * sizeof(tmp), &tmp, sizeof(tmp))) {
-- 
2.32.0.288.g62a8d224e6-goog


  parent reply	other threads:[~2021-06-23 23:06 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-23 23:05 [PATCH 0/7] KVM: x86: guest MAXPHYADDR and C-bit fixes Sean Christopherson
2021-06-23 23:05 ` [PATCH 1/7] KVM: x86: Use guest MAXPHYADDR from CPUID.0x8000_0008 iff TDP is enabled Sean Christopherson
2021-06-23 23:05 ` [PATCH 2/7] KVM: x86: Use kernel's x86_phys_bits to handle reduced MAXPHYADDR Sean Christopherson
2021-06-23 23:05 ` [PATCH 3/7] KVM: x86: Truncate reported guest MAXPHYADDR to C-bit if SEV is supported Sean Christopherson
2021-06-23 23:05 ` [PATCH 4/7] KVM: x86/mmu: Do not apply HPA (memory encryption) mask to GPAs Sean Christopherson
2021-06-23 23:05 ` Sean Christopherson [this message]
2021-06-23 23:05 ` [PATCH 6/7] KVM: x86/mmu: Bury 32-bit PSE paging helpers in paging_tmpl.h Sean Christopherson
2021-06-23 23:05 ` [PATCH 7/7] KVM: x86/mmu: Use separate namespaces for guest PTEs and shadow PTEs Sean Christopherson
2021-06-24  7:43 ` [PATCH 0/7] KVM: x86: guest MAXPHYADDR and C-bit fixes Paolo Bonzini
2021-06-24 16:30 ` Tom Lendacky
2021-06-24 16:36   ` Tom Lendacky
2021-06-24 17:31     ` Sean Christopherson
2021-06-24 17:39       ` Tom Lendacky
2021-06-24 22:07         ` Tom Lendacky
2021-06-24 22:15           ` Sean Christopherson
2021-06-24 22:19             ` Tom Lendacky
2021-06-24 23:47             ` Sean Christopherson

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