From: Sean Christopherson <seanjc@google.com>
To: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Peter Gonda <pgonda@google.com>,
Brijesh Singh <brijesh.singh@amd.com>
Subject: Re: [PATCH 0/7] KVM: x86: guest MAXPHYADDR and C-bit fixes
Date: Thu, 24 Jun 2021 17:31:34 +0000 [thread overview]
Message-ID: <YNTBdvWxwyx3T+Cs@google.com> (raw)
In-Reply-To: <c2d7a69a-386e-6f44-71c2-eb9a243c3a78@amd.com>
On Thu, Jun 24, 2021, Tom Lendacky wrote:
> >
> > Here's an explanation of the physical address reduction for bare-metal and
> > guest.
> >
> > With MSR 0xC001_0010[SMEE] = 0:
> > No reduction in host or guest max physical address.
> >
> > With MSR 0xC001_0010[SMEE] = 1:
> > - Reduction in the host is enumerated by CPUID 0x8000_001F_EBX[11:6],
> > regardless of whether SME is enabled in the host or not. So, for example
> > on EPYC generation 2 (Rome) you would see a reduction from 48 to 43.
> > - There is no reduction in physical address in a legacy guest (non-SEV
> > guest), so the guest can use a 48-bit physical address
So the behavior I'm seeing is either a CPU bug or user error. Can you verify
the unexpected #PF behavior to make sure I'm not doing something stupid?
Thanks!
> > - There is a reduction of only the encryption bit in an SEV guest, so
> > the guest can use up to a 47-bit physical address. This is why the
> > Qemu command line sev-guest option uses a value of 1 for the
> > "reduced-phys-bits" parameter.
> >
>
> The guest statements all assume that NPT is enabled.
>
> Thanks,
> Tom
next prev parent reply other threads:[~2021-06-24 17:31 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 23:05 [PATCH 0/7] KVM: x86: guest MAXPHYADDR and C-bit fixes Sean Christopherson
2021-06-23 23:05 ` [PATCH 1/7] KVM: x86: Use guest MAXPHYADDR from CPUID.0x8000_0008 iff TDP is enabled Sean Christopherson
2021-06-23 23:05 ` [PATCH 2/7] KVM: x86: Use kernel's x86_phys_bits to handle reduced MAXPHYADDR Sean Christopherson
2021-06-23 23:05 ` [PATCH 3/7] KVM: x86: Truncate reported guest MAXPHYADDR to C-bit if SEV is supported Sean Christopherson
2021-06-23 23:05 ` [PATCH 4/7] KVM: x86/mmu: Do not apply HPA (memory encryption) mask to GPAs Sean Christopherson
2021-06-23 23:05 ` [PATCH 5/7] KVM: VMX: Refactor 32-bit PSE PT creation to avoid using MMU macro Sean Christopherson
2021-06-23 23:05 ` [PATCH 6/7] KVM: x86/mmu: Bury 32-bit PSE paging helpers in paging_tmpl.h Sean Christopherson
2021-06-23 23:05 ` [PATCH 7/7] KVM: x86/mmu: Use separate namespaces for guest PTEs and shadow PTEs Sean Christopherson
2021-06-24 7:43 ` [PATCH 0/7] KVM: x86: guest MAXPHYADDR and C-bit fixes Paolo Bonzini
2021-06-24 16:30 ` Tom Lendacky
2021-06-24 16:36 ` Tom Lendacky
2021-06-24 17:31 ` Sean Christopherson [this message]
2021-06-24 17:39 ` Tom Lendacky
2021-06-24 22:07 ` Tom Lendacky
2021-06-24 22:15 ` Sean Christopherson
2021-06-24 22:19 ` Tom Lendacky
2021-06-24 23:47 ` Sean Christopherson
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