From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Ulf Hansson" <ulf.hansson@linaro.org>,
"Viresh Kumar" <vireshk@kernel.org>,
"Stephen Boyd" <sboyd@kernel.org>,
"Peter De Schrijver" <pdeschrijver@nvidia.com>,
"Mikko Perttunen" <mperttunen@nvidia.com>,
"Lee Jones" <lee.jones@linaro.org>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Nishanth Menon" <nm@ti.com>,
"Adrian Hunter" <adrian.hunter@intel.com>,
"Michael Turquette" <mturquette@baylibre.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-pm@vger.kernel.org, linux-pwm@vger.kernel.org,
linux-mmc@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-clk@vger.kernel.org, David Heidelberg <david@ixit.cz>
Subject: [PATCH v15 26/39] media: staging: tegra-vde: Support generic power domain
Date: Sun, 14 Nov 2021 22:34:22 +0300 [thread overview]
Message-ID: <20211114193435.7705-27-digetx@gmail.com> (raw)
In-Reply-To: <20211114193435.7705-1-digetx@gmail.com>
Currently driver supports legacy power domain API, this patch adds generic
power domain support. This allows us to utilize a modern GENPD API for
newer device-trees.
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/staging/media/tegra-vde/vde.c | 63 ++++++++++++++++++++++-----
1 file changed, 52 insertions(+), 11 deletions(-)
diff --git a/drivers/staging/media/tegra-vde/vde.c b/drivers/staging/media/tegra-vde/vde.c
index ed4c1250b303..859f60a70904 100644
--- a/drivers/staging/media/tegra-vde/vde.c
+++ b/drivers/staging/media/tegra-vde/vde.c
@@ -20,6 +20,7 @@
#include <linux/slab.h>
#include <linux/uaccess.h>
+#include <soc/tegra/common.h>
#include <soc/tegra/pmc.h>
#include "uapi.h"
@@ -920,13 +921,17 @@ static __maybe_unused int tegra_vde_runtime_suspend(struct device *dev)
struct tegra_vde *vde = dev_get_drvdata(dev);
int err;
- err = tegra_powergate_power_off(TEGRA_POWERGATE_VDEC);
- if (err) {
- dev_err(dev, "Failed to power down HW: %d\n", err);
- return err;
+ if (!dev->pm_domain) {
+ err = tegra_powergate_power_off(TEGRA_POWERGATE_VDEC);
+ if (err) {
+ dev_err(dev, "Failed to power down HW: %d\n", err);
+ return err;
+ }
}
clk_disable_unprepare(vde->clk);
+ reset_control_release(vde->rst);
+ reset_control_release(vde->rst_mc);
return 0;
}
@@ -936,14 +941,45 @@ static __maybe_unused int tegra_vde_runtime_resume(struct device *dev)
struct tegra_vde *vde = dev_get_drvdata(dev);
int err;
- err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC,
- vde->clk, vde->rst);
+ err = reset_control_acquire(vde->rst_mc);
if (err) {
- dev_err(dev, "Failed to power up HW : %d\n", err);
+ dev_err(dev, "Failed to acquire mc reset: %d\n", err);
return err;
}
+ err = reset_control_acquire(vde->rst);
+ if (err) {
+ dev_err(dev, "Failed to acquire reset: %d\n", err);
+ goto release_mc_reset;
+ }
+
+ if (!dev->pm_domain) {
+ err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC,
+ vde->clk, vde->rst);
+ if (err) {
+ dev_err(dev, "Failed to power up HW : %d\n", err);
+ goto release_reset;
+ }
+ } else {
+ /*
+ * tegra_powergate_sequence_power_up() leaves clocks enabled,
+ * while GENPD not.
+ */
+ err = clk_prepare_enable(vde->clk);
+ if (err) {
+ dev_err(dev, "Failed to enable clock: %d\n", err);
+ goto release_reset;
+ }
+ }
+
return 0;
+
+release_reset:
+ reset_control_release(vde->rst);
+release_mc_reset:
+ reset_control_release(vde->rst_mc);
+
+ return err;
}
static int tegra_vde_probe(struct platform_device *pdev)
@@ -1001,14 +1037,14 @@ static int tegra_vde_probe(struct platform_device *pdev)
return err;
}
- vde->rst = devm_reset_control_get(dev, NULL);
+ vde->rst = devm_reset_control_get_exclusive_released(dev, NULL);
if (IS_ERR(vde->rst)) {
err = PTR_ERR(vde->rst);
dev_err(dev, "Could not get VDE reset %d\n", err);
return err;
}
- vde->rst_mc = devm_reset_control_get_optional(dev, "mc");
+ vde->rst_mc = devm_reset_control_get_optional_exclusive_released(dev, "mc");
if (IS_ERR(vde->rst_mc)) {
err = PTR_ERR(vde->rst_mc);
dev_err(dev, "Could not get MC reset %d\n", err);
@@ -1026,6 +1062,12 @@ static int tegra_vde_probe(struct platform_device *pdev)
return err;
}
+ err = devm_tegra_core_dev_init_opp_table_common(dev);
+ if (err) {
+ dev_err(dev, "Could initialize OPP table %d\n", err);
+ return err;
+ }
+
vde->iram_pool = of_gen_pool_get(dev->of_node, "iram", 0);
if (!vde->iram_pool) {
dev_err(dev, "Could not get IRAM pool\n");
@@ -1133,8 +1175,7 @@ static void tegra_vde_shutdown(struct platform_device *pdev)
* On some devices bootloader isn't ready to a power-gated VDE on
* a warm-reboot, machine will hang in that case.
*/
- if (pm_runtime_status_suspended(&pdev->dev))
- tegra_vde_runtime_resume(&pdev->dev);
+ pm_runtime_get_sync(&pdev->dev);
}
static __maybe_unused int tegra_vde_pm_suspend(struct device *dev)
--
2.33.1
next prev parent reply other threads:[~2021-11-14 19:46 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-14 19:33 [PATCH v15 00/39] NVIDIA Tegra power management patches for 5.17 Dmitry Osipenko
2021-11-14 19:33 ` [PATCH v15 01/39] soc/tegra: Enable runtime PM during OPP state-syncing Dmitry Osipenko
2021-11-14 19:33 ` [PATCH v15 02/39] soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() Dmitry Osipenko
2021-11-14 19:33 ` [PATCH v15 03/39] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 04/39] dt-bindings: clock: tegra-car: Document new clock sub-nodes Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 05/39] clk: tegra: Support runtime PM and power domain Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 06/39] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 07/39] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 08/39] gpu: host1x: Add initial runtime PM and OPP support Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 09/39] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 10/39] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 11/39] drm/tegra: hdmi: Add OPP support Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 12/39] drm/tegra: gr2d: Support generic power domain and runtime PM Dmitry Osipenko
2021-11-28 5:47 ` Michał Mirosław
2021-11-28 21:50 ` Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 13/39] drm/tegra: gr3d: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 14/39] drm/tegra: vic: Stop channel on suspend Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 15/39] drm/tegra: nvdec: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 16/39] drm/tegra: submit: Remove pm_runtime_enabled() checks Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 17/39] drm/tegra: submit: Add missing pm_runtime_mark_last_busy() Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 18/39] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 19/39] bus: tegra-gmi: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 20/39] pwm: tegra: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 21/39] mmc: sdhci-tegra: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 22/39] mtd: rawnand: tegra: " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 23/39] spi: tegra20-slink: Add " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 24/39] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 25/39] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko
2021-11-14 19:34 ` Dmitry Osipenko [this message]
2021-11-14 19:34 ` [PATCH v15 27/39] soc/tegra: fuse: Reset hardware Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 28/39] soc/tegra: fuse: Use resource-managed helpers Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 29/39] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 30/39] soc/tegra: pmc: Rename 3d power domains Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 31/39] soc/tegra: pmc: Rename core power domain Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 32/39] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 33/39] ARM: tegra: Rename CPU and EMC OPP table device-tree nodes Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 34/39] ARM: tegra: Add 500MHz entry to Tegra30 memory OPP table Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 35/39] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 36/39] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 37/39] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 38/39] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko
2021-11-14 19:34 ` [PATCH v15 39/39] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko
2021-11-28 5:40 ` [PATCH v15 00/39] NVIDIA Tegra power management patches for 5.17 Michał Mirosław
2021-11-28 22:03 ` Dmitry Osipenko
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