[PATCH 0/5] i2c/arm: dt-bindings: qcom: qcom,i2c-cci: convert to dtschema

[PATCH 0/5] i2c/arm: dt-bindings: qcom: qcom,i2c-cci: convert to dtschema

[Krzysztof Kozlowski]

Hi,

The DTS patches are independent. Bindings can go via I2C tree, DTS via Qualcomm.

This is the most northern-patch I created so far: 71°10'21"N 25°47'04"E. Does
anyone needs a key-signing around? :)

The place is quite unusual for developing code although its location is
significant only in personal aspect. The geography does not impute any
particular importance of the patches. This is just one more small step towards
better DTS and broader DT schema validation.

Best regards,
Krzysztof

Krzysztof Kozlowski (5):
  arm64: dts: qcom: sdm845-db845c: drop power-domains from CCI I2C
    sensors
  arm64: dts: qcom: sdm845-db845c: drop gpios from CCI I2C sensors
  arm64: dts: qcom: use GPIO flags for tlmm
  ARM: dts: qcom: use GPIO flags for tlmm
  dt-bindings: i2c: qcom,i2c-cci: convert to dtschema

 .../devicetree/bindings/i2c/i2c-qcom-cci.txt  |  96 -------
 .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 242 ++++++++++++++++++
 MAINTAINERS                                   |   2 +-
 .../arm/boot/dts/qcom-apq8074-dragonboard.dts |   3 +-
 arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi |   3 +-
 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi |   4 +-
 .../boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts    |   5 +-
 .../qcom-msm8974-lge-nexus5-hammerhead.dts    |   2 +-
 arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts  |   2 +-
 .../qcom/msm8994-sony-xperia-kitakami.dtsi    |   2 +-
 arch/arm64/boot/dts/qcom/msm8994.dtsi         |   3 +-
 arch/arm64/boot/dts/qcom/msm8996.dtsi         |   3 +-
 arch/arm64/boot/dts/qcom/sdm845-db845c.dts    |  12 +-
 .../boot/dts/qcom/sdm845-xiaomi-beryllium.dts |   2 +-
 .../boot/dts/qcom/sdm845-xiaomi-polaris.dts   |   4 +-
 .../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts |   2 +-
 .../boot/dts/qcom/sdm850-samsung-w737.dts     |   2 +-
 arch/arm64/boot/dts/qcom/sm8250-mtp.dts       |   2 +-
 18 files changed, 267 insertions(+), 124 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
 create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml

-- 
2.34.1

[PATCH 1/5] arm64: dts: qcom: sdm845-db845c: drop power-domains from CCI I2C sensors

[Krzysztof Kozlowski]

The Camera Control Interface I2C controller device node belongs to
TITAN_TOP_GDSC power domain, so its children do not need to specify it
again.  The OV7251 and OV8856 camera sensor bindings do not allow
power-domains.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

---

Not tested on hardware.
---
 arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index c6e2c571b452..b9304f81290a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -1228,8 +1228,6 @@ camera@10 {
 		 * both have to be enabled through the power management
 		 * gpios.
 		 */
-		power-domains = <&clock_camcc TITAN_TOP_GDSC>;
-
 		dovdd-supply = <&vreg_lvs1a_1p8>;
 		avdd-supply = <&cam0_avdd_2v8>;
 		dvdd-supply = <&cam0_dvdd_1v2>;
@@ -1273,8 +1271,6 @@ camera@60 {
 		 *
 		 * No 1.2V vddd-supply regulator is used.
 		 */
-		power-domains = <&clock_camcc TITAN_TOP_GDSC>;
-
 		vdddo-supply = <&vreg_lvs1a_1p8>;
 		vdda-supply = <&cam3_avdd_2v8>;
 
-- 
2.34.1

[PATCH 2/5] arm64: dts: qcom: sdm845-db845c: drop gpios from CCI I2C sensors

[Krzysztof Kozlowski]

The OV7251 and OV8856 camera sensor bindings do not allow
property "gpios" and Linux driver does not parse it.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

---

Not tested on hardware.
---
 arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index b9304f81290a..f313f6964810 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -1214,8 +1214,6 @@ camera@10 {
 		reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&cam0_default>;
-		gpios = <&tlmm 13 0>,
-			<&tlmm 9 GPIO_ACTIVE_LOW>;
 
 		clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
 		clock-names = "xvclk";
@@ -1256,8 +1254,6 @@ camera@60 {
 		enable-gpios = <&tlmm 21 0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&cam3_default>;
-		gpios = <&tlmm 16 0>,
-			<&tlmm 21 0>;
 
 		clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
 		clock-names = "xclk";
-- 
2.34.1

[PATCH 3/5] arm64: dts: qcom: use GPIO flags for tlmm

[Krzysztof Kozlowski]

Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs.  Include
gpio.h header if this is first usage of that flag.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts               | 2 +-
 arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi | 2 +-
 arch/arm64/boot/dts/qcom/msm8994.dtsi                      | 3 ++-
 arch/arm64/boot/dts/qcom/msm8996.dtsi                      | 3 ++-
 arch/arm64/boot/dts/qcom/sdm845-db845c.dts                 | 4 ++--
 arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts       | 2 +-
 arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts         | 4 ++--
 arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts       | 2 +-
 arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts           | 2 +-
 arch/arm64/boot/dts/qcom/sm8250-mtp.dts                    | 2 +-
 10 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts b/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts
index 567b33106556..92f264891d84 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts
+++ b/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts
@@ -368,7 +368,7 @@ &sdhc2 {
 
 	bus-width = <4>;
 
-	cd-gpios = <&tlmm 38 0x1>;
+	cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
 
 	vmmc-supply = <&vreg_l21a_2p95>;
 	vqmmc-supply = <&vreg_l13a_2p95>;
diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
index f430d797196f..ff60b7004d26 100644
--- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
@@ -471,7 +471,7 @@ &sdhc1 {
 &sdhc2 {
 	status = "okay";
 
-	cd-gpios = <&tlmm 100 0>;
+	cd-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
 	vmmc-supply = <&pm8994_l21>;
 	vqmmc-supply = <&pm8994_l13>;
 };
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index 8bc6c070e306..86ef0091caff 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8994.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 
 / {
@@ -502,7 +503,7 @@ sdhc2: mmc@f98a4900 {
 			pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
 			pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
 
-			cd-gpios = <&tlmm 100 0>;
+			cd-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
 			bus-width = <4>;
 			status = "disabled";
 		};
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 742eac4ce9b3..0815b31c9e10 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/interconnect/qcom,msm8996.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,apr.h>
 #include <dt-bindings/thermal/thermal.h>
@@ -3337,7 +3338,7 @@ wcd9335: codec@1{
 					interrupt-names = "intr1", "intr2";
 					interrupt-controller;
 					#interrupt-cells = <1>;
-					reset-gpios = <&tlmm 64 0>;
+					reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
 
 					slim-ifc-dev = <&tasha_ifd>;
 
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index f313f6964810..dff49e3dfe56 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -1081,7 +1081,7 @@ &wcd9340{
 	pinctrl-names = "default";
 	clock-names = "extclk";
 	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
-	reset-gpios = <&tlmm 64 0>;
+	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
 	vdd-buck-supply = <&vreg_s4a_1p8>;
 	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
 	vdd-tx-supply = <&vreg_s4a_1p8>;
@@ -1251,7 +1251,7 @@ camera@60 {
 		reg = <0x60>;
 
 		// CAM3_RST_N
-		enable-gpios = <&tlmm 21 0>;
+		enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&cam3_default>;
 
diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts
index 82c27f90d300..0f470cf1ed1c 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts
@@ -546,7 +546,7 @@ &wcd9340{
 	pinctrl-names = "default";
 	clock-names = "extclk";
 	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
-	reset-gpios = <&tlmm 64 0>;
+	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
 	vdd-buck-supply = <&vreg_s4a_1p8>;
 	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
 	vdd-tx-supply = <&vreg_s4a_1p8>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
index 7747081b9887..6a2b98c23628 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
@@ -126,7 +126,7 @@ vreg_tp_vddio: vreg-tp-vddio {
 		regulator-min-microvolt = <1800000>;
 		regulator-max-microvolt = <1800000>;
 
-		gpio = <&tlmm 23 0>;
+		gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
 		regulator-always-on;
 		regulator-boot-on;
 		enable-active-high;
@@ -712,7 +712,7 @@ &wcd9340 {
 	pinctrl-names = "default";
 	clock-names = "extclk";
 	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
-	reset-gpios = <&tlmm 64 0>;
+	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
 	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
 	vdd-buck-supply = <&vreg_s4a_1p8>;
 	vdd-tx-supply = <&vreg_s4a_1p8>;
diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
index a7af1bed4312..be59a8ba9c1f 100644
--- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
+++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
@@ -772,7 +772,7 @@ &wcd9340{
 	pinctrl-names = "default";
 	clock-names = "extclk";
 	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
-	reset-gpios = <&tlmm 64 0>;
+	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
 	vdd-buck-supply = <&vreg_s4a_1p8>;
 	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
 	vdd-tx-supply = <&vreg_s4a_1p8>;
diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
index b0315eeb1320..f954fe5cb61a 100644
--- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
+++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
@@ -704,7 +704,7 @@ &wcd9340{
 	pinctrl-names = "default";
 	clock-names = "extclk";
 	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
-	reset-gpios = <&tlmm 64 0>;
+	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
 	vdd-buck-supply = <&vreg_s4a_1p8>;
 	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
 	vdd-tx-supply = <&vreg_s4a_1p8>;
diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
index 7ab3627cc347..a102aa5efa32 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
@@ -635,7 +635,7 @@ &soc {
 	wcd938x: codec {
 		compatible = "qcom,wcd9380-codec";
 		#sound-dai-cells = <1>;
-		reset-gpios = <&tlmm 32 0>;
+		reset-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
 		vdd-buck-supply = <&vreg_s4a_1p8>;
 		vdd-rxtx-supply = <&vreg_s4a_1p8>;
 		vdd-io-supply = <&vreg_s4a_1p8>;
-- 
2.34.1

[PATCH 4/5] ARM: dts: qcom: use GPIO flags for tlmm

[Krzysztof Kozlowski]

Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs.  Include
gpio.h header if this is first usage of that flag.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts           | 3 ++-
 arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi            | 3 ++-
 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi            | 4 ++--
 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts          | 5 +++--
 arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +-
 5 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
index 3051a861ff0c..91716298ec5e 100644
--- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
+++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
@@ -1,4 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/gpio/gpio.h>
 #include "qcom-msm8974.dtsi"
 #include "qcom-pm8841.dtsi"
 #include "qcom-pm8941.dtsi"
@@ -261,7 +262,7 @@ &sdhc_1 {
 &sdhc_2 {
 	status = "okay";
 
-	cd-gpios = <&tlmm 62 0x1>;
+	cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
 	vmmc-supply = <&pm8941_l21>;
 	vqmmc-supply = <&pm8941_l13>;
 
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index 03bb9e1768c4..0505270cf508 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -14,6 +14,7 @@
  *
  */
 
+#include <dt-bindings/gpio/gpio.h>
 #include "qcom-ipq4019.dtsi"
 
 / {
@@ -72,7 +73,7 @@ spi@78b5000 {
 			pinctrl-0 = <&spi_0_pins>;
 			pinctrl-names = "default";
 			status = "okay";
-			cs-gpios = <&tlmm 54 0>;
+			cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 
 			mx25l25635e@0 {
 				#address-cells = <1>;
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
index 44a9597d8bfd..c2f5222e72de 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -87,7 +87,7 @@ spi@78b5000 { /* BLSP1 QUP1 */
 			pinctrl-0 = <&spi_0_pins>;
 			pinctrl-names = "default";
 			status = "okay";
-			cs-gpios = <&tlmm 12 0>;
+			cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 
 			flash@0 {
 				#address-cells = <1>;
@@ -100,7 +100,7 @@ flash@0 {
 
 		pci@40000000 {
 			status = "okay";
-			perst-gpio = <&tlmm 38 0x1>;
+			perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 		};
 
 		qpic-nand@79b0000 {
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
index c7a6e77da272..7fc33149060c 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 // Copyright (c) 2018, The Linux Foundation. All rights reserved.
 
+#include <dt-bindings/gpio/gpio.h>
 #include "qcom-ipq4019-ap.dk07.1.dtsi"
 
 / {
@@ -10,7 +11,7 @@ / {
 	soc {
 		pci@40000000 {
 			status = "okay";
-			perst-gpio = <&tlmm 38 0x1>;
+			perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 		};
 
 		spi@78b6000 {
@@ -50,7 +51,7 @@ spi@78b5000 {
 			pinctrl-0 = <&spi_0_pins>;
 			pinctrl-names = "default";
 			status = "okay";
-			cs-gpios = <&tlmm 12 0>;
+			cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 
 			flash@0 {
 				#address-cells = <1>;
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index ec5d340562b6..6daceaa87802 100644
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -175,7 +175,7 @@ i2c-gate {
 			ak8963@f {
 				compatible = "asahi-kasei,ak8963";
 				reg = <0x0f>;
-				gpios = <&tlmm 67 0>;
+				gpios = <&tlmm 67 GPIO_ACTIVE_HIGH>;
 				vid-supply = <&pm8941_lvs1>;
 				vdd-supply = <&pm8941_l17>;
 			};
-- 
2.34.1

[PATCH 5/5] dt-bindings: i2c: qcom,i2c-cci: convert to dtschema

[Krzysztof Kozlowski]

Convert the Qualcomm Camera Control Interface (CCI) I2C controller to DT
schema.  The original bindings were not complete, so this includes
changes:
1. Add address/size-cells.
2. Describe the clocks per variant.
3. Use more descriptive example based on sdm845.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/i2c/i2c-qcom-cci.txt  |  96 -------
 .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 242 ++++++++++++++++++
 MAINTAINERS                                   |   2 +-
 3 files changed, 243 insertions(+), 97 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
 create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml

diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
deleted file mode 100644
index 166865e48849..000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
+++ /dev/null
@@ -1,96 +0,0 @@
-Qualcomm Camera Control Interface (CCI) I2C controller
-
-PROPERTIES:
-
-- compatible:
-	Usage: required
-	Value type: <string>
-	Definition: must be one of:
-		"qcom,msm8916-cci"
-		"qcom,msm8974-cci"
-		"qcom,msm8996-cci"
-		"qcom,sdm845-cci"
-		"qcom,sm8250-cci"
-		"qcom,sm8450-cci"
-
-- reg
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: base address CCI I2C controller and length of memory
-		    mapped region.
-
-- interrupts:
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: specifies the CCI I2C interrupt. The format of the
-		    specifier is defined by the binding document describing
-		    the node's interrupt parent.
-
-- clocks:
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: a list of phandle, should contain an entry for each
-		    entries in clock-names.
-
-- clock-names
-	Usage: required
-	Value type: <string>
-	Definition: a list of clock names, must include "cci" clock.
-
-- power-domains
-	Usage: required for "qcom,msm8996-cci"
-	Value type: <prop-encoded-array>
-	Definition:
-
-SUBNODES:
-
-The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8974,
-msm8996, sdm845, sm8250 and sm8450), described as subdevices named "i2c-bus@0"
-and "i2c-bus@1".
-
-PROPERTIES:
-
-- reg:
-	Usage: required
-	Value type: <u32>
-	Definition: Index of the CCI bus/master
-
-- clock-frequency:
-	Usage: optional
-	Value type: <u32>
-	Definition: Desired I2C bus clock frequency in Hz, defaults to 100
-		    kHz if omitted.
-
-Example:
-
-	cci@a0c000 {
-		compatible = "qcom,msm8996-cci";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0xa0c000 0x1000>;
-		interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
-		clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
-			 <&mmcc CAMSS_TOP_AHB_CLK>,
-			 <&mmcc CAMSS_CCI_AHB_CLK>,
-			 <&mmcc CAMSS_CCI_CLK>,
-			 <&mmcc CAMSS_AHB_CLK>;
-		clock-names = "mmss_mmagic_ahb",
-			      "camss_top_ahb",
-			      "cci_ahb",
-			      "cci",
-			      "camss_ahb";
-
-		i2c-bus@0 {
-			reg = <0>;
-			clock-frequency = <400000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		i2c-bus@1 {
-			reg = <1>;
-			clock-frequency = <400000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
new file mode 100644
index 000000000000..90c9e401229e
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
@@ -0,0 +1,242 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Camera Control Interface (CCI) I2C controller
+
+maintainers:
+  - Loic Poulain <loic.poulain@linaro.org>
+  - Robert Foss <robert.foss@linaro.org>
+
+properties:
+  compatible:
+    enum:
+      - qcom,msm8916-cci
+      - qcom,msm8974-cci
+      - qcom,msm8996-cci
+      - qcom,sdm845-cci
+      - qcom,sm8250-cci
+      - qcom,sm8450-cci
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+  clocks:
+    minItems: 4
+    maxItems: 6
+
+  clock-names:
+    minItems: 4
+    maxItems: 6
+
+  interrupts:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+  reg:
+    maxItems: 1
+
+patternProperties:
+  "^i2c-bus@[01]$":
+    $ref: /schemas/i2c/i2c-controller.yaml#
+    unevaluatedProperties: false
+
+    properties:
+      reg:
+        maxItems: 1
+
+      clock-frequency:
+        default: 100000
+
+required:
+  - compatible
+  - clock-names
+  - clocks
+  - interrupts
+  - reg
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,msm8996-cci
+    then:
+      required:
+        - power-domains
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,msm8916-cci
+    then:
+      properties:
+        i2c-bus@1: false
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,msm8916-cci
+              - qcom,msm8996-cci
+    then:
+      properties:
+        clocks:
+          maxItems: 4
+        clock-names:
+          items:
+            - const: camss_top_ahb
+            - const: cci_ahb
+            - const: cci
+            - const: camss_ahb
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,sdm845-cci
+    then:
+      properties:
+        clocks:
+          minItems: 6
+        clock-names:
+          items:
+            - const: camnoc_axi
+            - const: soc_ahb
+            - const: slow_ahb_src
+            - const: cpas_ahb
+            - const: cci
+            - const: cci_src
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,sm8250-cci
+    then:
+      properties:
+        clocks:
+          minItems: 5
+          maxItems: 5
+        clock-names:
+          items:
+            - const: camnoc_axi
+            - const: slow_ahb_src
+            - const: cpas_ahb
+            - const: cci
+            - const: cci_src
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,camcc-sdm845.h>
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    cci@ac4a000 {
+        reg = <0x0ac4a000 0x4000>;
+        compatible = "qcom,sdm845-cci";
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
+        power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+        clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+                 <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+                 <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+                 <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+                 <&clock_camcc CAM_CC_CCI_CLK>,
+                 <&clock_camcc CAM_CC_CCI_CLK_SRC>;
+        clock-names = "camnoc_axi",
+                      "soc_ahb",
+                      "slow_ahb_src",
+                      "cpas_ahb",
+                      "cci",
+                      "cci_src";
+
+        assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+                          <&clock_camcc CAM_CC_CCI_CLK>;
+        assigned-clock-rates = <80000000>,
+                               <37500000>;
+
+        pinctrl-names = "default", "sleep";
+        pinctrl-0 = <&cci0_default &cci1_default>;
+        pinctrl-1 = <&cci0_sleep &cci1_sleep>;
+
+        i2c-bus@0 {
+            reg = <0>;
+            clock-frequency = <1000000>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            camera@10 {
+                compatible = "ovti,ov8856";
+                reg = <0x10>;
+
+                reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&cam0_default>;
+
+                clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+                clock-names = "xvclk";
+                clock-frequency = <19200000>;
+
+                dovdd-supply = <&vreg_lvs1a_1p8>;
+                avdd-supply = <&cam0_avdd_2v8>;
+                dvdd-supply = <&cam0_dvdd_1v2>;
+
+                port {
+                    ov8856_ep: endpoint {
+                        link-frequencies = /bits/ 64 <360000000 180000000>;
+                        data-lanes = <1 2 3 4>;
+                        remote-endpoint = <&csiphy0_ep>;
+                    };
+                };
+            };
+        };
+
+        cci_i2c1: i2c-bus@1 {
+            reg = <1>;
+            clock-frequency = <1000000>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            camera@60 {
+                compatible = "ovti,ov7251";
+                reg = <0x60>;
+
+                enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&cam3_default>;
+
+                clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
+                clock-names = "xclk";
+                clock-frequency = <24000000>;
+
+                vdddo-supply = <&vreg_lvs1a_1p8>;
+                vdda-supply = <&cam3_avdd_2v8>;
+
+                port {
+                    ov7251_ep: endpoint {
+                        data-lanes = <0 1>;
+                        remote-endpoint = <&csiphy3_ep>;
+                    };
+                };
+            };
+        };
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 56af0182a93b..ea0aaf754eaf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16882,7 +16882,7 @@ M:	Robert Foss <robert.foss@linaro.org>
 L:	linux-i2c@vger.kernel.org
 L:	linux-arm-msm@vger.kernel.org
 S:	Maintained
-F:	Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
+F:	Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
 F:	drivers/i2c/busses/i2c-qcom-cci.c
 
 QUALCOMM INTERCONNECT BWMON DRIVER
-- 
2.34.1

Re: [PATCH 4/5] ARM: dts: qcom: use GPIO flags for tlmm

[Konrad Dybcio]

On 2.08.2022 17:39, Krzysztof Kozlowski wrote:
> Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs.  Include
> gpio.h header if this is first usage of that flag.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  arch/arm/boot/dts/qcom-apq8074-dragonboard.dts           | 3 ++-
>  arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi            | 3 ++-
>  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi            | 4 ++--
>  arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts          | 5 +++--
>  arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +-
>  5 files changed, 10 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> index 3051a861ff0c..91716298ec5e 100644
> --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> @@ -1,4 +1,5 @@
>  // SPDX-License-Identifier: GPL-2.0
> +#include <dt-bindings/gpio/gpio.h>
>  #include "qcom-msm8974.dtsi"
>  #include "qcom-pm8841.dtsi"
>  #include "qcom-pm8941.dtsi"
> @@ -261,7 +262,7 @@ &sdhc_1 {
>  &sdhc_2 {
>  	status = "okay";
>  
> -	cd-gpios = <&tlmm 62 0x1>;
> +	cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
>  	vmmc-supply = <&pm8941_l21>;
>  	vqmmc-supply = <&pm8941_l13>;
>  
> diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> index 03bb9e1768c4..0505270cf508 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> @@ -14,6 +14,7 @@
>   *
>   */
>  
> +#include <dt-bindings/gpio/gpio.h>
>  #include "qcom-ipq4019.dtsi"
>  
>  / {
> @@ -72,7 +73,7 @@ spi@78b5000 {
>  			pinctrl-0 = <&spi_0_pins>;
>  			pinctrl-names = "default";
>  			status = "okay";
> -			cs-gpios = <&tlmm 54 0>;
> +			cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
>  
>  			mx25l25635e@0 {
>  				#address-cells = <1>;
> diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> index 44a9597d8bfd..c2f5222e72de 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> @@ -87,7 +87,7 @@ spi@78b5000 { /* BLSP1 QUP1 */
>  			pinctrl-0 = <&spi_0_pins>;
>  			pinctrl-names = "default";
>  			status = "okay";
> -			cs-gpios = <&tlmm 12 0>;
> +			cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
>  
>  			flash@0 {
>  				#address-cells = <1>;
> @@ -100,7 +100,7 @@ flash@0 {
>  
>  		pci@40000000 {
>  			status = "okay";
> -			perst-gpio = <&tlmm 38 0x1>;
> +			perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
>  		};
>  
>  		qpic-nand@79b0000 {
> diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
> index c7a6e77da272..7fc33149060c 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
> +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  // Copyright (c) 2018, The Linux Foundation. All rights reserved.
>  
> +#include <dt-bindings/gpio/gpio.h>
>  #include "qcom-ipq4019-ap.dk07.1.dtsi"
>  
>  / {
> @@ -10,7 +11,7 @@ / {
>  	soc {
>  		pci@40000000 {
>  			status = "okay";
> -			perst-gpio = <&tlmm 38 0x1>;
> +			perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
>  		};
>  
>  		spi@78b6000 {
> @@ -50,7 +51,7 @@ spi@78b5000 {
>  			pinctrl-0 = <&spi_0_pins>;
>  			pinctrl-names = "default";
>  			status = "okay";
> -			cs-gpios = <&tlmm 12 0>;
> +			cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
>  
>  			flash@0 {
>  				#address-cells = <1>;
> diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
> index ec5d340562b6..6daceaa87802 100644
> --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
> +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
> @@ -175,7 +175,7 @@ i2c-gate {
>  			ak8963@f {
>  				compatible = "asahi-kasei,ak8963";
>  				reg = <0x0f>;
> -				gpios = <&tlmm 67 0>;
> +				gpios = <&tlmm 67 GPIO_ACTIVE_HIGH>;
>  				vid-supply = <&pm8941_lvs1>;
>  				vdd-supply = <&pm8941_l17>;
>  			};

Re: [PATCH 3/5] arm64: dts: qcom: use GPIO flags for tlmm

[Konrad Dybcio]

On 2.08.2022 17:39, Krzysztof Kozlowski wrote:
> Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs.  Include
> gpio.h header if this is first usage of that flag.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts               | 2 +-
>  arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi | 2 +-
>  arch/arm64/boot/dts/qcom/msm8994.dtsi                      | 3 ++-
>  arch/arm64/boot/dts/qcom/msm8996.dtsi                      | 3 ++-
>  arch/arm64/boot/dts/qcom/sdm845-db845c.dts                 | 4 ++--
>  arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts       | 2 +-
>  arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts         | 4 ++--
>  arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts       | 2 +-
>  arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts           | 2 +-
>  arch/arm64/boot/dts/qcom/sm8250-mtp.dts                    | 2 +-
>  10 files changed, 14 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts b/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts
> index 567b33106556..92f264891d84 100644
> --- a/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts
> +++ b/arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts
> @@ -368,7 +368,7 @@ &sdhc2 {
>  
>  	bus-width = <4>;
>  
> -	cd-gpios = <&tlmm 38 0x1>;
> +	cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
>  
>  	vmmc-supply = <&vreg_l21a_2p95>;
>  	vqmmc-supply = <&vreg_l13a_2p95>;
> diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
> index f430d797196f..ff60b7004d26 100644
> --- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
> @@ -471,7 +471,7 @@ &sdhc1 {
>  &sdhc2 {
>  	status = "okay";
>  
> -	cd-gpios = <&tlmm 100 0>;
> +	cd-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
>  	vmmc-supply = <&pm8994_l21>;
>  	vqmmc-supply = <&pm8994_l13>;
>  };
> diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
> index 8bc6c070e306..86ef0091caff 100644
> --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
> @@ -6,6 +6,7 @@
>  #include <dt-bindings/clock/qcom,gcc-msm8994.h>
>  #include <dt-bindings/clock/qcom,mmcc-msm8994.h>
>  #include <dt-bindings/clock/qcom,rpmcc.h>
> +#include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/power/qcom-rpmpd.h>
>  
>  / {
> @@ -502,7 +503,7 @@ sdhc2: mmc@f98a4900 {
>  			pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
>  			pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
>  
> -			cd-gpios = <&tlmm 100 0>;
> +			cd-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
>  			bus-width = <4>;
>  			status = "disabled";
>  		};
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 742eac4ce9b3..0815b31c9e10 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -7,6 +7,7 @@
>  #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
>  #include <dt-bindings/clock/qcom,rpmcc.h>
>  #include <dt-bindings/interconnect/qcom,msm8996.h>
> +#include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/power/qcom-rpmpd.h>
>  #include <dt-bindings/soc/qcom,apr.h>
>  #include <dt-bindings/thermal/thermal.h>
> @@ -3337,7 +3338,7 @@ wcd9335: codec@1{
>  					interrupt-names = "intr1", "intr2";
>  					interrupt-controller;
>  					#interrupt-cells = <1>;
> -					reset-gpios = <&tlmm 64 0>;
> +					reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
>  
>  					slim-ifc-dev = <&tasha_ifd>;
>  
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> index f313f6964810..dff49e3dfe56 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> @@ -1081,7 +1081,7 @@ &wcd9340{
>  	pinctrl-names = "default";
>  	clock-names = "extclk";
>  	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
> -	reset-gpios = <&tlmm 64 0>;
> +	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
>  	vdd-buck-supply = <&vreg_s4a_1p8>;
>  	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
>  	vdd-tx-supply = <&vreg_s4a_1p8>;
> @@ -1251,7 +1251,7 @@ camera@60 {
>  		reg = <0x60>;
>  
>  		// CAM3_RST_N
> -		enable-gpios = <&tlmm 21 0>;
> +		enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&cam3_default>;
>  
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts
> index 82c27f90d300..0f470cf1ed1c 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts
> @@ -546,7 +546,7 @@ &wcd9340{
>  	pinctrl-names = "default";
>  	clock-names = "extclk";
>  	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
> -	reset-gpios = <&tlmm 64 0>;
> +	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
>  	vdd-buck-supply = <&vreg_s4a_1p8>;
>  	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
>  	vdd-tx-supply = <&vreg_s4a_1p8>;
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
> index 7747081b9887..6a2b98c23628 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
> @@ -126,7 +126,7 @@ vreg_tp_vddio: vreg-tp-vddio {
>  		regulator-min-microvolt = <1800000>;
>  		regulator-max-microvolt = <1800000>;
>  
> -		gpio = <&tlmm 23 0>;
> +		gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
>  		regulator-always-on;
>  		regulator-boot-on;
>  		enable-active-high;
> @@ -712,7 +712,7 @@ &wcd9340 {
>  	pinctrl-names = "default";
>  	clock-names = "extclk";
>  	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
> -	reset-gpios = <&tlmm 64 0>;
> +	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
>  	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
>  	vdd-buck-supply = <&vreg_s4a_1p8>;
>  	vdd-tx-supply = <&vreg_s4a_1p8>;
> diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
> index a7af1bed4312..be59a8ba9c1f 100644
> --- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
> @@ -772,7 +772,7 @@ &wcd9340{
>  	pinctrl-names = "default";
>  	clock-names = "extclk";
>  	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
> -	reset-gpios = <&tlmm 64 0>;
> +	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
>  	vdd-buck-supply = <&vreg_s4a_1p8>;
>  	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
>  	vdd-tx-supply = <&vreg_s4a_1p8>;
> diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
> index b0315eeb1320..f954fe5cb61a 100644
> --- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
> @@ -704,7 +704,7 @@ &wcd9340{
>  	pinctrl-names = "default";
>  	clock-names = "extclk";
>  	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
> -	reset-gpios = <&tlmm 64 0>;
> +	reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
>  	vdd-buck-supply = <&vreg_s4a_1p8>;
>  	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
>  	vdd-tx-supply = <&vreg_s4a_1p8>;
> diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> index 7ab3627cc347..a102aa5efa32 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> @@ -635,7 +635,7 @@ &soc {
>  	wcd938x: codec {
>  		compatible = "qcom,wcd9380-codec";
>  		#sound-dai-cells = <1>;
> -		reset-gpios = <&tlmm 32 0>;
> +		reset-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
>  		vdd-buck-supply = <&vreg_s4a_1p8>;
>  		vdd-rxtx-supply = <&vreg_s4a_1p8>;
>  		vdd-io-supply = <&vreg_s4a_1p8>;

Re: [PATCH 1/5] arm64: dts: qcom: sdm845-db845c: drop power-domains from CCI I2C sensors

[Konrad Dybcio]

On 2.08.2022 17:39, Krzysztof Kozlowski wrote:
> The Camera Control Interface I2C controller device node belongs to
> TITAN_TOP_GDSC power domain, so its children do not need to specify it
> again.  The OV7251 and OV8856 camera sensor bindings do not allow
> power-domains.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> ---
> 
> Not tested on hardware.
> ---
Not tested on hardware either, but looks good.

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> index c6e2c571b452..b9304f81290a 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> @@ -1228,8 +1228,6 @@ camera@10 {
>  		 * both have to be enabled through the power management
>  		 * gpios.
>  		 */
> -		power-domains = <&clock_camcc TITAN_TOP_GDSC>;
> -
>  		dovdd-supply = <&vreg_lvs1a_1p8>;
>  		avdd-supply = <&cam0_avdd_2v8>;
>  		dvdd-supply = <&cam0_dvdd_1v2>;
> @@ -1273,8 +1271,6 @@ camera@60 {
>  		 *
>  		 * No 1.2V vddd-supply regulator is used.
>  		 */
> -		power-domains = <&clock_camcc TITAN_TOP_GDSC>;
> -
>  		vdddo-supply = <&vreg_lvs1a_1p8>;
>  		vdda-supply = <&cam3_avdd_2v8>;
>  

Re: [PATCH 5/5] dt-bindings: i2c: qcom,i2c-cci: convert to dtschema

[Rob Herring]

On Tue, 02 Aug 2022 17:39:47 +0200, Krzysztof Kozlowski wrote:
> Convert the Qualcomm Camera Control Interface (CCI) I2C controller to DT
> schema.  The original bindings were not complete, so this includes
> changes:
> 1. Add address/size-cells.
> 2. Describe the clocks per variant.
> 3. Use more descriptive example based on sdm845.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  .../devicetree/bindings/i2c/i2c-qcom-cci.txt  |  96 -------
>  .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 242 ++++++++++++++++++
>  MAINTAINERS                                   |   2 +-
>  3 files changed, 243 insertions(+), 97 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
>  create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH 5/5] dt-bindings: i2c: qcom,i2c-cci: convert to dtschema

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 476 bytes --]

On Tue, Aug 02, 2022 at 05:39:47PM +0200, Krzysztof Kozlowski wrote:
> Convert the Qualcomm Camera Control Interface (CCI) I2C controller to DT
> schema.  The original bindings were not complete, so this includes
> changes:
> 1. Add address/size-cells.
> 2. Describe the clocks per variant.
> 3. Use more descriptive example based on sdm845.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Northern patch applied to for-current, thanks!


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Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c: drop gpios from CCI I2C sensors

[Robert Foss]

On Tue, 2 Aug 2022 at 17:40, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> The OV7251 and OV8856 camera sensor bindings do not allow
> property "gpios" and Linux driver does not parse it.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
>
> Not tested on hardware.
> ---
>  arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4 ----
>  1 file changed, 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> index b9304f81290a..f313f6964810 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
> @@ -1214,8 +1214,6 @@ camera@10 {
>                 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
>                 pinctrl-names = "default";
>                 pinctrl-0 = <&cam0_default>;
> -               gpios = <&tlmm 13 0>,
> -                       <&tlmm 9 GPIO_ACTIVE_LOW>;
>
>                 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
>                 clock-names = "xvclk";
> @@ -1256,8 +1254,6 @@ camera@60 {
>                 enable-gpios = <&tlmm 21 0>;
>                 pinctrl-names = "default";
>                 pinctrl-0 = <&cam3_default>;
> -               gpios = <&tlmm 16 0>,
> -                       <&tlmm 21 0>;
>
>                 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
>                 clock-names = "xclk";
> --
> 2.34.1

Reviewed-by: Robert Foss <robert.foss@linaro.org>

Re: (subset) [PATCH 0/5] i2c/arm: dt-bindings: qcom: qcom,i2c-cci: convert to dtschema

[Bjorn Andersson]

On Tue, 2 Aug 2022 17:39:42 +0200, Krzysztof Kozlowski wrote:
> The DTS patches are independent. Bindings can go via I2C tree, DTS via Qualcomm.
> 
> This is the most northern-patch I created so far: 71°10'21"N 25°47'04"E. Does
> anyone needs a key-signing around? :)
> 
> The place is quite unusual for developing code although its location is
> significant only in personal aspect. The geography does not impute any
> particular importance of the patches. This is just one more small step towards
> better DTS and broader DT schema validation.
> 
> [...]

Applied, thanks!

[1/5] arm64: dts: qcom: sdm845-db845c: drop power-domains from CCI I2C sensors
      commit: 62e60e35309d977eac7f9775574ac01b5c7371fc
[2/5] arm64: dts: qcom: sdm845-db845c: drop gpios from CCI I2C sensors
      commit: a64f7d415281db0b727911de0035809f756b10d7
[3/5] arm64: dts: qcom: use GPIO flags for tlmm
      commit: 36c9d012f193747d42af80b634217addd974c522

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>