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From: "Moger, Babu" <Babu.Moger@amd.com>
To: Reinette Chatre <reinette.chatre@intel.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
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	"fenghua.yu@intel.com" <fenghua.yu@intel.com>,
	"vikas.shivappa@linux.intel.com" <vikas.shivappa@linux.intel.com>,
	"tony.luck@intel.com" <tony.luck@intel.com>
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	"peterz@infradead.org" <peterz@infradead.org>,
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	"Hurwitz, Sherry" <sherry.hurwitz@amd.com>,
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Subject: Re: [RFC PATCH 07/10] arch/x86: Bring few more functions into the resource structure
Date: Wed, 3 Oct 2018 15:32:29 +0000	[thread overview]
Message-ID: <21cf288a-d9c9-a976-863b-5bb875d01ecc@amd.com> (raw)
In-Reply-To: <6a4085c8-b220-1694-eb96-e858f2a091f5@intel.com>



On 10/02/2018 05:07 PM, Reinette Chatre wrote:
> Hi Babu,
> 
> On 9/24/2018 12:19 PM, Moger, Babu wrote:
>> Bring all resource functions that are different between the vendors
>> into resource structure and initialize them dynamically.
>>
>> Implement these functions separately for each vendors.
>> update_mba_bw : Feedback loop bandwidth update functionality is not
>>                 needed for AMD.
>> cbm_validate  : Cache bitmask validate function. AMD allows
>>                 non-contiguous masks. So, use separate functions for
>>                 Intel and AMD.
>>
>> Signed-off-by: Babu Moger <babu.moger@amd.com>
>> ---
>>  arch/x86/kernel/cpu/rdt.c             | 17 +++++++++++++----
>>  arch/x86/kernel/cpu/rdt.h             | 19 +++++++++++++------
>>  arch/x86/kernel/cpu/rdt_ctrlmondata.c |  4 ++--
>>  arch/x86/kernel/cpu/rdt_monitor.c     | 10 +++++++---
>>  4 files changed, 35 insertions(+), 15 deletions(-)
>>
>> diff --git a/arch/x86/kernel/cpu/rdt.c b/arch/x86/kernel/cpu/rdt.c
>> index 6dec45bf81d6..ae26b9b3fafa 100644
>> --- a/arch/x86/kernel/cpu/rdt.c
>> +++ b/arch/x86/kernel/cpu/rdt.c
>> @@ -867,10 +867,19 @@ static __init void rdt_init_res_defs_intel(void)
>>  	struct rdt_resource *r;
>>  
>>  	for_each_rdt_resource(r) {
>> -		if (r->rid == RDT_RESOURCE_MBA) {
>> -			r->msr_base = IA32_MBA_THRTL_BASE;
>> -			r->msr_update = mba_wrmsr;
>> -			r->parse_ctrlval = parse_bw;
>> +		if ((r->rid == RDT_RESOURCE_L3) ||
>> +		    (r->rid == RDT_RESOURCE_L3DATA) ||
>> +		    (r->rid == RDT_RESOURCE_L3CODE) ||
>> +		    (r->rid == RDT_RESOURCE_L2) ||
>> +		    (r->rid == RDT_RESOURCE_L2DATA) ||
>> +		    (r->rid == RDT_RESOURCE_L2CODE))
>> +			r->cbm_validate = cbm_validate;
> 
> Same comment here about naming as in patch 6. Later cbm_validate_amd
> would appear while this remains - to help reduce confusion it may help
> to rename this function to cbm_validate_intel at this time.

Sure.  Will make this change.

> 
>> +
>> +		else if (r->rid == RDT_RESOURCE_MBA) {
>> +			 r->msr_base = IA32_MBA_THRTL_BASE;
>> +			 r->msr_update = mba_wrmsr;
>> +			 r->parse_ctrlval = parse_bw;
>> +			 r->update_mba_bw = update_mba_bw;
> 
> Same comment about naming.

Yes.  Will add _intel to these functions.

> 
>>  		}
>>  	}
>>  }
>> diff --git a/arch/x86/kernel/cpu/rdt.h b/arch/x86/kernel/cpu/rdt.h
>> index 2569c10c37f4..7205157d359b 100644
>> --- a/arch/x86/kernel/cpu/rdt.h
>> +++ b/arch/x86/kernel/cpu/rdt.h
>> @@ -386,9 +386,9 @@ static inline bool is_mbm_event(int e)
>>   * struct rdt_resource - attributes of an RDT resource
>>   * @rid:		The index of the resource
>>   * @alloc_enabled:	Is allocation enabled on this machine
>> - * @mon_enabled:		Is monitoring enabled for this feature
>> + * @mon_enabled:	Is monitoring enabled for this feature
>>   * @alloc_capable:	Is allocation available on this machine
>> - * @mon_capable:		Is monitor feature available on this machine
>> + * @mon_capable:	Is monitor feature available on this machine
>>   * @name:		Name to use in "schemata" file
>>   * @num_closid:		Number of CLOSIDs available
>>   * @cache_level:	Which cache level defines scope of this resource
>> @@ -400,10 +400,12 @@ static inline bool is_mbm_event(int e)
>>   * @cache:		Cache allocation related data
>>   * @format_str:		Per resource format string to show domain value
>>   * @parse_ctrlval:	Per resource function pointer to parse control values
>> - * @evt_list:			List of monitoring events
>> - * @num_rmid:			Number of RMIDs available
>> - * @mon_scale:			cqm counter * mon_scale = occupancy in bytes
>> - * @fflags:			flags to choose base and info files
>> + * @update_mba_bw:	Feedback loop for MBA software controllerer function
> 
> controllerer -> controller ?

Yes. Will fix it.

> 
>> + * @cbm_validate	Cache bitmask validate function
>> + * @evt_list:		List of monitoring events
>> + * @num_rmid:		Number of RMIDs available
>> + * @mon_scale:		cqm counter * mon_scale = occupancy in bytes
>> + * @fflags:		flags to choose base and info files
>>   */
>>  struct rdt_resource {
>>  	int			rid;
>> @@ -425,6 +427,9 @@ struct rdt_resource {
>>  	const char		*format_str;
>>  	int (*parse_ctrlval)	(void *data, struct rdt_resource *r,
>>  				 struct rdt_domain *d);
>> +	void (*update_mba_bw)   (struct rdtgroup *rgrp,
>> +				 struct rdt_domain *dom_mbm);
>> +	bool (*cbm_validate)    (char *buf, u32 *data, struct rdt_resource *r);
>>  	struct list_head	evt_list;
>>  	int			num_rmid;
>>  	unsigned int		mon_scale;
>> @@ -562,5 +567,7 @@ void cqm_setup_limbo_handler(struct rdt_domain *dom, unsigned long delay_ms);
>>  void cqm_handle_limbo(struct work_struct *work);
>>  bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d);
>>  void __check_limbo(struct rdt_domain *d, bool force_free);
>> +void update_mba_bw(struct rdtgroup *rgrp, struct rdt_domain *dom_mbm);
>> +bool cbm_validate(char *buf, u32 *data, struct rdt_resource *r);
>>  
>>  #endif /* _ASM_X86_RDT_H */
>> diff --git a/arch/x86/kernel/cpu/rdt_ctrlmondata.c b/arch/x86/kernel/cpu/rdt_ctrlmondata.c
>> index 0565c564b297..5a282b6c4bd7 100644
>> --- a/arch/x86/kernel/cpu/rdt_ctrlmondata.c
>> +++ b/arch/x86/kernel/cpu/rdt_ctrlmondata.c
>> @@ -88,7 +88,7 @@ int parse_bw(void *_buf, struct rdt_resource *r, struct rdt_domain *d)
>>   *	are allowed (e.g. FFFFH, 0FF0H, 003CH, etc.).
>>   * Additionally Haswell requires at least two bits set.
>>   */
>> -static bool cbm_validate(char *buf, u32 *data, struct rdt_resource *r)
>> +bool cbm_validate(char *buf, u32 *data, struct rdt_resource *r)
>>  {
>>  	unsigned long first_bit, zero_bit, val;
>>  	unsigned int cbm_len = r->cache.cbm_len;
>> @@ -153,7 +153,7 @@ int parse_cbm(void *_data, struct rdt_resource *r, struct rdt_domain *d)
>>  		return -EINVAL;
>>  	}
>>  
>> -	if (!cbm_validate(data->buf, &cbm_val, r))
>> +	if ((r->cbm_validate) && !(r->cbm_validate(data->buf, &cbm_val, r)))
> 
> I do not think you need all of those brackets.

Yes. Will simplify this.

> 
> Reinette
> 

  reply	other threads:[~2018-10-03 15:32 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-24 19:18 [RFC PATCH 00/10] arch/x86: AMD QoS support Moger, Babu
2018-09-24 19:18 ` [RFC PATCH 01/10] arch/x86: Start renaming the rdt files to more generic names Moger, Babu
2018-09-24 19:18 ` [RFC PATCH 02/10] arch/x86: Rename the RDT functions and definitions Moger, Babu
2018-09-24 19:19 ` [RFC PATCH 03/10] arch/x86: Re-arrange RDT init code Moger, Babu
2018-10-02 19:21   ` Reinette Chatre
2018-10-02 23:41     ` Moger, Babu
2018-10-03 18:54       ` Reinette Chatre
2018-10-03 20:12         ` Moger, Babu
2018-09-24 19:19 ` [RFC PATCH 04/10] arch/x86: Introduce a new config parameter PLATFORM_QOS Moger, Babu
2018-09-24 19:19 ` [RFC PATCH 05/10] arch/x86: Use new config parameter PLATFORM_QOS for compilation Moger, Babu
2018-09-24 19:19 ` [RFC PATCH 06/10] arch/x86: Initialize the resource functions that are different Moger, Babu
2018-10-02 22:06   ` Reinette Chatre
2018-10-03 15:25     ` Moger, Babu
2018-09-24 19:19 ` [RFC PATCH 07/10] arch/x86: Bring few more functions into the resource structure Moger, Babu
2018-10-02 22:07   ` Reinette Chatre
2018-10-03 15:32     ` Moger, Babu [this message]
2018-09-24 19:19 ` [RFC PATCH 08/10] arch/x86: Introduce new config parameter AMD_QOS Moger, Babu
2018-09-24 19:19 ` [RFC PATCH 09/10] arch/x86: Add AMD feature bit X86_FEATURE_MBA in cpuid bits array Moger, Babu
2018-09-24 19:19 ` [RFC PATCH 10/10] arch/x86: Introduce QOS feature for AMD Moger, Babu
2018-10-02 18:27   ` Fenghua Yu
2018-10-03 15:56     ` Moger, Babu
2018-10-02 22:13   ` Reinette Chatre
2018-10-03 17:21     ` Moger, Babu
2018-10-05 16:20   ` James Morse
2018-10-05 17:18     ` Moger, Babu
2018-09-27 20:14 ` [RFC PATCH 00/10] arch/x86: AMD QoS support Thomas Gleixner
2018-09-28  1:57   ` Moger, Babu
2018-10-05 16:18     ` James Morse
2018-10-05 17:03       ` Moger, Babu
2018-10-02 17:06 ` Fenghua Yu
2018-10-02 17:44   ` Moger, Babu
2018-10-02 18:46     ` Fenghua Yu
2018-10-02 19:16       ` Moger, Babu
2018-10-03 18:52         ` Fenghua Yu
2018-10-03 19:48           ` Thomas Gleixner
2018-10-03 20:09           ` Moger, Babu
2018-10-05 16:19             ` James Morse

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