From: Florian Fainelli <f.fainelli@gmail.com>
To: Jim Quinlan <james.quinlan@broadcom.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Florian Fainelli <f.fainelli@gmail.com>,
"maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE"
<bcm-kernel-feedback-list@broadcom.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS"
<linux-pci@vger.kernel.org>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/5] PCI: brcmstb: fix window register offset from 4 to 8
Date: Thu, 30 Apr 2020 12:07:37 -0700 [thread overview]
Message-ID: <4a0459c8-fd61-7ac1-9624-b201c800700d@gmail.com> (raw)
In-Reply-To: <20200430185522.4116-2-james.quinlan@broadcom.com>
On 4/30/20 11:55 AM, Jim Quinlan wrote:
> From: Jim Quinlan <jquinlan@broadcom.com>
>
> The oubound memory window registers were being referenced
> with an incorrect offset. This probably wasn't noticed
> previously as there was likely only one such outbound window.
>
> Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
Fixes: c0452137034b ("PCI: brcmstb: Add Broadcom STB PCIe host
controller driver")
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
next prev parent reply other threads:[~2020-04-30 19:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 18:55 [PATCH 1/5] PCI: brcmstb: don't clk_put() a managed clock Jim Quinlan
2020-04-30 18:55 ` [PATCH 2/5] PCI: brcmstb: fix window register offset from 4 to 8 Jim Quinlan
2020-04-30 19:07 ` Florian Fainelli [this message]
2020-04-30 20:43 ` Bjorn Helgaas
2020-04-30 18:55 ` [PATCH 3/5] PCI: brcmstb: enable CRS Jim Quinlan
2020-04-30 19:19 ` Florian Fainelli
2020-04-30 20:32 ` Bjorn Helgaas
2020-04-30 21:00 ` Jim Quinlan
2020-04-30 18:55 ` [PATCH 4/5] dt-bindings: PCI: brcmstb: New prop 'brcm,aspm-en-l0s' Jim Quinlan
2020-04-30 19:20 ` Florian Fainelli
2020-04-30 18:55 ` [PATCH 5/5] PCI: brcmstb: disable L0s component of ASPM by default Jim Quinlan
2020-04-30 19:21 ` Florian Fainelli
2020-04-30 20:40 ` Bjorn Helgaas
2020-04-30 21:17 ` Jim Quinlan
2020-04-30 19:05 ` [PATCH 1/5] PCI: brcmstb: don't clk_put() a managed clock Florian Fainelli
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