From: "Zhu, Yi Xin" <yixin.zhu@linux.intel.com>
To: Stephen Boyd <sboyd@kernel.org>,
Songjun Wu <songjun.wu@linux.intel.com>,
chuanhua.lei@linux.intel.com, hua.ma@linux.intel.com,
qi-ming.wu@intel.com
Cc: linux-mips@linux-mips.org, linux-clk@vger.kernel.org,
linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v2 02/18] clk: intel: Add clock driver for Intel MIPS SoCs
Date: Wed, 29 Aug 2018 18:34:26 +0800 [thread overview]
Message-ID: <65a8518b-8fd8-847b-f952-0370be3d786a@linux.intel.com> (raw)
In-Reply-To: <153539697928.129321.2605078315090527674@swboyd.mtv.corp.google.com>
>>>> +}
>>>> +
>>>> +CLK_OF_DECLARE(intel_grx500_cgu, "intel,grx500-cgu", grx500_clk_init);
>>> Any reason a platform driver can't be used instead of CLK_OF_DECLARE()?
>> It provides CPU clock which is used in early boot stage.
>>
> Ok. What is the CPU clock doing in early boot stage? Some sort of timer
> frequency? If the driver can be split into two pieces, one to handle the
> really early stuff that must be in place to get timers up and running
> and the other to register the rest of the clks that aren't critical from
> a regular platform driver it would be good. That's preferred model if
> something is super critical.
>
Just to make sure my approach is same as you think.
In the driver, there's two clock registrations.
- One through CLK_OF_DECLARE for early stage clocks.
- The other via platform driver for the non-critical clocks.
In the device tree, two clock device nodes are required.
e.g. device tree:
cgu: cgu@16200000 {
compatible = "intel,grx500-clk", "syscon";
reg = <0x16200000 0x200>;
#clock-cells = <1>;
};
clk: clk {
compatible = "intel,grx500-cgu";
#clock-cells = <1>;
intel,cgu-syscon = <&cgu>;
};
source code:
CLK_OF_DECLARE(intel_grx500_cgu, "intel,grx500-cgu", grx500_clk_init);
static const struct of_device_id of_intel_grx500_cgu_match[] = {
{ .compatible = "intel,grx500-clk" },
{}
};
static struct platform_driver intel_grx500_clk_driver = {
.probe = intel_grx500_clk_probe,
.driver = {
.name = "grx500-cgu",
.of_match_table = of_match_ptr(of_intel_grx500_cgu_match),
},
};
static int __init intel_grx500_cgu_init(void)
{
return platform_driver_register(&intel_grx500_clk_driver);
}
arch_initcall(intel_grx500_cgu_init);
next prev parent reply other threads:[~2018-08-29 10:34 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-03 3:02 [PATCH v2 00/18] MIPS: intel: add initial support for Intel MIPS SoCs Songjun Wu
2018-08-03 3:02 ` [PATCH v2 01/18] MIPS: intel: Add " Songjun Wu
2018-08-03 17:49 ` Paul Burton
2018-08-06 9:12 ` Hua Ma
2018-08-03 3:02 ` [PATCH v2 02/18] clk: intel: Add clock driver " Songjun Wu
2018-08-06 15:19 ` Rob Herring
2018-08-08 2:51 ` yixin zhu
2018-08-08 5:50 ` Stephen Boyd
2018-08-08 8:52 ` yixin zhu
2018-08-27 19:09 ` Stephen Boyd
2018-08-29 6:56 ` Zhu, Yi Xin
2018-08-31 17:10 ` Stephen Boyd
2018-09-03 10:47 ` Zhu, Yi Xin
2018-08-29 10:34 ` Zhu, Yi Xin [this message]
2018-08-31 17:13 ` Stephen Boyd
2018-09-03 10:52 ` Zhu, Yi Xin
2018-08-03 3:02 ` [PATCH v2 03/18] dt-bindings: clk: Add documentation of grx500 clock controller Songjun Wu
2018-08-06 15:18 ` Rob Herring
2018-08-08 3:08 ` yixin zhu
2018-08-08 14:54 ` Rob Herring
2018-08-03 3:02 ` [PATCH v2 04/18] MIPS: dts: Add initial support for Intel MIPS SoCs Songjun Wu
2018-08-04 11:11 ` Hauke Mehrtens
2018-08-06 9:20 ` Hua Ma
2018-08-03 3:02 ` [PATCH v2 05/18] dt-binding: MIPS: Add documentation of " Songjun Wu
2018-08-06 15:16 ` Rob Herring
2018-08-03 3:02 ` [PATCH v2 06/18] MIPS: dts: Change upper case to lower case Songjun Wu
2018-08-06 15:14 ` Rob Herring
2018-08-03 3:02 ` [PATCH v2 07/18] MIPS: dts: Add aliases node for lantiq danube serial Songjun Wu
2018-08-03 3:02 ` [PATCH v2 08/18] serial: intel: Get serial id from dts Songjun Wu
2018-08-03 5:43 ` Greg Kroah-Hartman
2018-08-06 9:32 ` Wu, Songjun
2018-08-07 7:33 ` Geert Uytterhoeven
2018-08-08 4:05 ` Wu, Songjun
2018-08-08 8:33 ` Geert Uytterhoeven
2018-08-10 8:13 ` Wu, Songjun
2018-08-03 3:02 ` [PATCH v2 09/18] serial: intel: Change ltq_w32_mask to asc_update_bits Songjun Wu
2018-08-03 3:02 ` [PATCH v2 10/18] MIPS: lantiq: Unselect SWAP_IO_SPACE when LANTIQ is selected Songjun Wu
2018-08-03 3:02 ` [PATCH v2 11/18] serial: intel: Use readl/writel instead of ltq_r32/ltq_w32 Songjun Wu
2018-08-03 3:02 ` [PATCH v2 12/18] serial: intel: Rename fpiclk to freqclk Songjun Wu
2018-08-03 3:02 ` [PATCH v2 13/18] serial: intel: Replace clk_enable/clk_disable with clk generic API Songjun Wu
2018-08-03 3:02 ` [PATCH v2 14/18] serial: intel: Add CCF support Songjun Wu
2018-08-03 5:56 ` Greg Kroah-Hartman
2018-08-03 7:33 ` Wu, Songjun
2018-08-03 10:30 ` Greg Kroah-Hartman
2018-08-04 10:54 ` Hauke Mehrtens
2018-08-04 12:43 ` Greg Kroah-Hartman
2018-08-04 21:03 ` Arnd Bergmann
2018-08-06 7:05 ` Wu, Songjun
2018-08-06 7:20 ` Geert Uytterhoeven
2018-08-06 8:58 ` Wu, Songjun
2018-08-06 9:29 ` Geert Uytterhoeven
2018-08-07 7:18 ` Wu, Songjun
2018-08-07 7:33 ` Geert Uytterhoeven
2018-08-03 3:02 ` [PATCH v2 15/18] serial: intel: Support more platform Songjun Wu
2018-08-03 5:57 ` Greg Kroah-Hartman
2018-08-03 7:21 ` Wu, Songjun
2018-08-05 8:37 ` Christoph Hellwig
2018-08-06 7:20 ` Wu, Songjun
2018-08-03 3:02 ` [PATCH v2 16/18] serial: intel: Reorder the head files Songjun Wu
2018-08-03 3:02 ` [PATCH v2 17/18] serial: intel: Change init_lqasc to static declaration Songjun Wu
2018-08-03 3:02 ` [PATCH v2 18/18] dt-bindings: serial: lantiq: Add optional properties for CCF Songjun Wu
2018-08-13 17:53 ` Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=65a8518b-8fd8-847b-f952-0370be3d786a@linux.intel.com \
--to=yixin.zhu@linux.intel.com \
--cc=chuanhua.lei@linux.intel.com \
--cc=devicetree@vger.kernel.org \
--cc=hua.ma@linux.intel.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=linux-serial@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=qi-ming.wu@intel.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=songjun.wu@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).