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From: yixin zhu <yixin.zhu@linux.intel.com>
To: Rob Herring <robh+dt@kernel.org>,
	Songjun Wu <songjun.wu@linux.intel.com>
Cc: hua.ma@linux.intel.com, chuanhua.lei@linux.intel.com,
	qi-ming.wu@intel.com, Linux-MIPS <linux-mips@linux-mips.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
	devicetree@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v2 03/18] dt-bindings: clk: Add documentation of grx500 clock controller
Date: Wed, 8 Aug 2018 11:08:48 +0800	[thread overview]
Message-ID: <9c0cbdfa-8109-be0d-8e14-7d303c764f5c@linux.intel.com> (raw)
In-Reply-To: <CAL_JsqKLa1e3X+ddAoVdEwBQFd6tsL=RjOLcTLdfoc6mpKuefQ@mail.gmail.com>



On 8/6/2018 11:18 PM, Rob Herring wrote:
> On Thu, Aug 2, 2018 at 9:03 PM Songjun Wu <songjun.wu@linux.intel.com> wrote:
>> From: Yixin Zhu <yixin.zhu@linux.intel.com>
>>
>> This patch adds binding documentation for grx500 clock controller.
>>
>> Signed-off-by: YiXin Zhu <yixin.zhu@linux.intel.com>
>> Signed-off-by: Songjun Wu <songjun.wu@linux.intel.com>
>> ---
>>
>> Changes in v2:
>> - Rewrite clock driver's dt-binding document according to Rob Herring's
>>    comments.
>> - Simplify device tree docoment, remove some clock description.
>>
>>   .../devicetree/bindings/clock/intel,grx500-clk.txt | 39 ++++++++++++++++++++++
> Please match the compatible string: intel,grx500-cgu.txt
Will update to use same name.

>
>>   1 file changed, 39 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/intel,grx500-clk.txt
>>
>> diff --git a/Documentation/devicetree/bindings/clock/intel,grx500-clk.txt b/Documentation/devicetree/bindings/clock/intel,grx500-clk.txt
>> new file mode 100644
>> index 000000000000..e54e1dad9196
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/intel,grx500-clk.txt
>> @@ -0,0 +1,39 @@
>> +Device Tree Clock bindings for grx500 PLL controller.
>> +
>> +This binding uses the common clock binding:
>> +       Documentation/devicetree/bindings/clock/clock-bindings.txt
>> +
>> +The grx500 clock controller supplies clock to various controllers within the
>> +SoC.
>> +
>> +Required properties for clock node
>> +- compatible: Should be "intel,grx500-cgu".
>> +- reg: physical base address of the controller and length of memory range.
>> +- #clock-cells: should be 1.
>> +
>> +Optional Propteries:
>> +- intel,osc-frequency: frequency of the osc clock.
>> +if missing, driver will use clock rate defined in the driver.
> This should use a fixed-clock node instead.
Yes, This is a fixed clock node registered in driver code.
The frequency of the fixed clock is designed to be overwritten by device 
tree in case some one verify
clock driver in the emulation platform or in some cases frequency other 
than driver defined one is preferred.
These kinds of cases are very rare. But I feel it would be better to 
have a way to use customized frequency.
The frequency defined in device tree will overwritten driver defined 
frequency before registering fixed-clock node.

>> +
>> +Example: Clock controller node:
>> +
>> +       cgu: cgu@16200000 {
>> +                compatible = "intel,grx500-cgu", "syscon";
>> +               reg = <0x16200000 0x200>;
>> +               #clock-cells = <1>;
>> +       };
>> +
>> +
>> +Example: UART controller node that consumes the clock generated by clock
>> +       controller.
>> +
>> +       asc0: serial@16600000 {
>> +               compatible = "lantiq,asc";
>> +               reg = <0x16600000 0x100000>;
>> +               interrupt-parent = <&gic>;
>> +               interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>,
>> +                       <GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>,
>> +                       <GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>;
>> +               clocks = <&cgu CLK_SSX4>, <&cgu GCLK_UART>;
>> +               clock-names = "freq", "asc";
>> +       };
>> --
>> 2.11.0
>>


  reply	other threads:[~2018-08-08  3:08 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-03  3:02 [PATCH v2 00/18] MIPS: intel: add initial support for Intel MIPS SoCs Songjun Wu
2018-08-03  3:02 ` [PATCH v2 01/18] MIPS: intel: Add " Songjun Wu
2018-08-03 17:49   ` Paul Burton
2018-08-06  9:12     ` Hua Ma
2018-08-03  3:02 ` [PATCH v2 02/18] clk: intel: Add clock driver " Songjun Wu
2018-08-06 15:19   ` Rob Herring
2018-08-08  2:51     ` yixin zhu
2018-08-08  5:50   ` Stephen Boyd
2018-08-08  8:52     ` yixin zhu
2018-08-27 19:09       ` Stephen Boyd
2018-08-29  6:56         ` Zhu, Yi Xin
2018-08-31 17:10           ` Stephen Boyd
2018-09-03 10:47             ` Zhu, Yi Xin
2018-08-29 10:34         ` Zhu, Yi Xin
2018-08-31 17:13           ` Stephen Boyd
2018-09-03 10:52             ` Zhu, Yi Xin
2018-08-03  3:02 ` [PATCH v2 03/18] dt-bindings: clk: Add documentation of grx500 clock controller Songjun Wu
2018-08-06 15:18   ` Rob Herring
2018-08-08  3:08     ` yixin zhu [this message]
2018-08-08 14:54       ` Rob Herring
2018-08-03  3:02 ` [PATCH v2 04/18] MIPS: dts: Add initial support for Intel MIPS SoCs Songjun Wu
2018-08-04 11:11   ` Hauke Mehrtens
2018-08-06  9:20     ` Hua Ma
2018-08-03  3:02 ` [PATCH v2 05/18] dt-binding: MIPS: Add documentation of " Songjun Wu
2018-08-06 15:16   ` Rob Herring
2018-08-03  3:02 ` [PATCH v2 06/18] MIPS: dts: Change upper case to lower case Songjun Wu
2018-08-06 15:14   ` Rob Herring
2018-08-03  3:02 ` [PATCH v2 07/18] MIPS: dts: Add aliases node for lantiq danube serial Songjun Wu
2018-08-03  3:02 ` [PATCH v2 08/18] serial: intel: Get serial id from dts Songjun Wu
2018-08-03  5:43   ` Greg Kroah-Hartman
2018-08-06  9:32     ` Wu, Songjun
2018-08-07  7:33   ` Geert Uytterhoeven
2018-08-08  4:05     ` Wu, Songjun
2018-08-08  8:33       ` Geert Uytterhoeven
2018-08-10  8:13         ` Wu, Songjun
2018-08-03  3:02 ` [PATCH v2 09/18] serial: intel: Change ltq_w32_mask to asc_update_bits Songjun Wu
2018-08-03  3:02 ` [PATCH v2 10/18] MIPS: lantiq: Unselect SWAP_IO_SPACE when LANTIQ is selected Songjun Wu
2018-08-03  3:02 ` [PATCH v2 11/18] serial: intel: Use readl/writel instead of ltq_r32/ltq_w32 Songjun Wu
2018-08-03  3:02 ` [PATCH v2 12/18] serial: intel: Rename fpiclk to freqclk Songjun Wu
2018-08-03  3:02 ` [PATCH v2 13/18] serial: intel: Replace clk_enable/clk_disable with clk generic API Songjun Wu
2018-08-03  3:02 ` [PATCH v2 14/18] serial: intel: Add CCF support Songjun Wu
2018-08-03  5:56   ` Greg Kroah-Hartman
2018-08-03  7:33     ` Wu, Songjun
2018-08-03 10:30       ` Greg Kroah-Hartman
2018-08-04 10:54         ` Hauke Mehrtens
2018-08-04 12:43           ` Greg Kroah-Hartman
2018-08-04 21:03             ` Arnd Bergmann
2018-08-06  7:05               ` Wu, Songjun
2018-08-06  7:20                 ` Geert Uytterhoeven
2018-08-06  8:58                   ` Wu, Songjun
2018-08-06  9:29                     ` Geert Uytterhoeven
2018-08-07  7:18                       ` Wu, Songjun
2018-08-07  7:33                         ` Geert Uytterhoeven
2018-08-03  3:02 ` [PATCH v2 15/18] serial: intel: Support more platform Songjun Wu
2018-08-03  5:57   ` Greg Kroah-Hartman
2018-08-03  7:21     ` Wu, Songjun
2018-08-05  8:37   ` Christoph Hellwig
2018-08-06  7:20     ` Wu, Songjun
2018-08-03  3:02 ` [PATCH v2 16/18] serial: intel: Reorder the head files Songjun Wu
2018-08-03  3:02 ` [PATCH v2 17/18] serial: intel: Change init_lqasc to static declaration Songjun Wu
2018-08-03  3:02 ` [PATCH v2 18/18] dt-bindings: serial: lantiq: Add optional properties for CCF Songjun Wu
2018-08-13 17:53   ` Rob Herring

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