From: Marc Zyngier <maz@kernel.org>
To: Huacai Chen <chenhuacai@loongson.cn>
Cc: Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, Xuefeng Li <lixuefeng@loongson.cn>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Chen Zhu <zhuchen@loongson.cn>
Subject: Re: [PATCH 2/9] irqchip/loongson-pch-pic: Improve edge triggered interrupt support
Date: Tue, 06 Jul 2021 14:06:01 +0100 [thread overview]
Message-ID: <878s2j8udi.wl-maz@kernel.org> (raw)
In-Reply-To: <20210706030904.1411775-3-chenhuacai@loongson.cn>
On Tue, 06 Jul 2021 04:08:57 +0100,
Huacai Chen <chenhuacai@loongson.cn> wrote:
>
> Edge-triggered mode and level-triggered mode need different handlers,
> and edge-triggered mode need a specific ack operation. So improve it.
>
Is this a fix? How does it work currently?
> Signed-off-by: Chen Zhu <zhuchen@loongson.cn>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> ---
> drivers/irqchip/irq-loongson-pch-pic.c | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
> index f790ca6d78aa..a4eb8a2181c7 100644
> --- a/drivers/irqchip/irq-loongson-pch-pic.c
> +++ b/drivers/irqchip/irq-loongson-pch-pic.c
> @@ -92,18 +92,22 @@ static int pch_pic_set_type(struct irq_data *d, unsigned int type)
> case IRQ_TYPE_EDGE_RISING:
> pch_pic_bitset(priv, PCH_PIC_EDGE, d->hwirq);
> pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq);
> + irq_set_handler_locked(d, handle_edge_irq);
> break;
> case IRQ_TYPE_EDGE_FALLING:
> pch_pic_bitset(priv, PCH_PIC_EDGE, d->hwirq);
> pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq);
> + irq_set_handler_locked(d, handle_edge_irq);
> break;
> case IRQ_TYPE_LEVEL_HIGH:
> pch_pic_bitclr(priv, PCH_PIC_EDGE, d->hwirq);
> pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq);
> + irq_set_handler_locked(d, handle_level_irq);
> break;
> case IRQ_TYPE_LEVEL_LOW:
> pch_pic_bitclr(priv, PCH_PIC_EDGE, d->hwirq);
> pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq);
> + irq_set_handler_locked(d, handle_level_irq);
You are changing the flow for the whole hierarchy. Are all the
irqchips in the stack supporting this?
> break;
> default:
> ret = -EINVAL;
> @@ -113,11 +117,24 @@ static int pch_pic_set_type(struct irq_data *d, unsigned int type)
> return ret;
> }
>
> +static void pch_pic_ack_irq(struct irq_data *d)
> +{
> + unsigned int reg;
> + struct pch_pic *priv = irq_data_get_irq_chip_data(d);
> +
> + reg = readl(priv->base + PCH_PIC_EDGE + PIC_REG_IDX(d->hwirq) * 4);
> + if (reg & BIT(PIC_REG_BIT(d->hwirq))) {
> + writel(BIT(PIC_REG_BIT(d->hwirq)),
> + priv->base + PCH_PIC_CLR + PIC_REG_IDX(d->hwirq) * 4);
> + }
> + irq_chip_ack_parent(d);
> +}
> +
> static struct irq_chip pch_pic_irq_chip = {
> .name = "PCH PIC",
> .irq_mask = pch_pic_mask_irq,
> .irq_unmask = pch_pic_unmask_irq,
> - .irq_ack = irq_chip_ack_parent,
> + .irq_ack = pch_pic_ack_irq,
> .irq_set_affinity = irq_chip_set_affinity_parent,
> .irq_set_type = pch_pic_set_type,
> };
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-07-06 13:06 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-06 3:08 [PATCH 0/9] irqchip: Add LoongArch-related irqchip drivers Huacai Chen
2021-07-06 3:08 ` [PATCH 1/9] irqchip: Adjust Kconfig for Loongson Huacai Chen
2021-07-06 3:08 ` [PATCH 2/9] irqchip/loongson-pch-pic: Improve edge triggered interrupt support Huacai Chen
2021-07-06 13:06 ` Marc Zyngier [this message]
2021-07-09 3:00 ` Huacai Chen
2021-08-04 14:23 ` Marc Zyngier
2021-08-05 13:06 ` Huacai Chen
2021-07-06 3:08 ` [PATCH 3/9] irqchip/loongson-pch-pic: Add ACPI init support Huacai Chen
2021-07-06 13:10 ` Marc Zyngier
2021-07-07 4:50 ` Huacai Chen
2021-08-12 12:23 ` Huacai Chen
2021-08-12 13:28 ` Marc Zyngier
2021-08-16 3:19 ` Huacai Chen
2021-07-06 3:08 ` [PATCH 4/9] irqchip/loongson-pch-msi: " Huacai Chen
2021-07-06 13:12 ` Marc Zyngier
2021-07-07 4:51 ` Huacai Chen
2021-07-06 3:09 ` [PATCH 5/9] irqchip/loongson-htvec: " Huacai Chen
2021-07-06 13:13 ` Marc Zyngier
2021-07-07 4:52 ` Huacai Chen
2021-07-06 3:09 ` [PATCH 6/9] irqchip/loongson-liointc: " Huacai Chen
2021-07-06 3:09 ` [PATCH 7/9] irqchip: Add LoongArch CPU interrupt controller support Huacai Chen
2021-07-06 13:21 ` Marc Zyngier
2021-07-07 4:57 ` Huacai Chen
2021-07-06 3:09 ` [PATCH 8/9] irqchip: Add Loongson Extended I/O " Huacai Chen
2021-07-06 3:09 ` [PATCH 9/9] irqchip: Add Loongson PCH LPC " Huacai Chen
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