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From: "Li, Xin3" <xin3.li@intel.com>
To: Brian Gerst <brgerst@gmail.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"x86@kernel.org" <x86@kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"bp@alien8.de" <bp@alien8.de>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	"hpa@zytor.com" <hpa@zytor.com>
Subject: RE: [PATCH 6/6] x86/gsseg: use the LKGS instruction if available for load_gs_index()
Date: Sat, 8 Oct 2022 05:40:21 +0000	[thread overview]
Message-ID: <BN6PR1101MB2161E1191DF1BD0135DC3947A85E9@BN6PR1101MB2161.namprd11.prod.outlook.com> (raw)
In-Reply-To: <CAMzpN2iccL5kNa2UaBXppiLnoNWrpwJd74+uBrB_63N0F5F5Xg@mail.gmail.com>

> > +       alternative_io("1: call asm_load_gs_index\n"
> > +                      ".pushsection \".fixup\",\"ax\"\n"
> > +                      "2:      xorl %k[sel], %k[sel]\n"
> > +                      "        jmp 1b\n"
> > +                      ".popsection\n"
> > +                      _ASM_EXTABLE(1b, 2b),
> > +                      _ASM_BYTES(0x3e) LKGS_DI,
> > +                      X86_FEATURE_LKGS,
> > +                      ASM_OUTPUT2([sel] "+D" (sel), ASM_CALL_CONSTRAINT),
> > +                      ASM_NO_INPUT_CLOBBER(_ASM_AX));
> >  }
> >
> >  #endif /* CONFIG_X86_64 */
> > --
> > 2.34.1
> 
> There are not that many call sites, so using something like this (incorporating
> Peter Z's suggestion for the exception handler) would be better from a code
> readability perspective vs. a tiny increase in code size.

The existing approach patches the binary code thus we don't need to check it at runtime.

> 
>         if (static_cpu_has(X86_FEATURE_LKGS))
>                 asm volatile("1: " LKGS_DI
>                              _ASM_EXTABLE_TYPE_REG(1b, 1b, EX_TYPE_ZERO_REG,
> %k[sel])
>                              : [sel] "+D" (sel) : : "memory");
>         else
>                 asm_load_gs_index(sel);


  reply	other threads:[~2022-10-08  5:40 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-06 15:40 [PATCH 0/6] Enable LKGS instruction Xin Li
2022-10-06 15:40 ` [PATCH 1/6] x86/cpufeature: add cpu feature bit for LKGS Xin Li
2022-10-06 15:40 ` [PATCH 2/6] x86/opcode: add LKGS instruction to x86-opcode-map Xin Li
2022-10-06 15:40 ` [PATCH 3/6] x86/gsseg: make asm_load_gs_index() take an u16 Xin Li
2022-10-06 15:40 ` [PATCH 4/6] x86/gsseg: move local_irq_save/restore() into asm_load_gs_index() Xin Li
2022-10-07 14:50   ` Peter Zijlstra
2022-10-07 17:47     ` H. Peter Anvin
2022-10-06 15:40 ` [PATCH 5/6] x86/gsseg: move load_gs_index() to its own header file Xin Li
2022-10-07 15:40   ` Brian Gerst
2022-10-07 17:43     ` H. Peter Anvin
2022-10-07 22:41       ` Li, Xin3
2022-10-06 15:40 ` [PATCH 6/6] x86/gsseg: use the LKGS instruction if available for load_gs_index() Xin Li
2022-10-07 14:47   ` Peter Zijlstra
2022-10-07 17:45     ` H. Peter Anvin
2022-10-07 18:07       ` Li, Xin3
2022-10-07 18:49         ` H. Peter Anvin
2022-10-07 18:01     ` Li, Xin3
2022-10-07 19:24       ` Peter Zijlstra
2022-10-07 20:03         ` H. Peter Anvin
2022-10-07 20:23           ` Peter Zijlstra
2022-10-07 20:33             ` H. Peter Anvin
2022-10-08  5:32               ` Li, Xin3
2022-10-08  7:16                 ` H. Peter Anvin
2022-10-10  4:21                   ` Li, Xin3
2022-10-14  4:36               ` Li, Xin3
2022-10-07 14:52   ` Peter Zijlstra
2022-10-07 15:09   ` Peter Zijlstra
2022-10-08  5:31     ` Li, Xin3
2022-10-07 16:18   ` Brian Gerst
2022-10-08  5:40     ` Li, Xin3 [this message]
2022-10-08 12:40       ` Brian Gerst
2022-10-10  4:32         ` Li, Xin3
2022-10-10  4:51           ` H. Peter Anvin
2022-10-10  7:53           ` Peter Zijlstra

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