From: Jann Horn <jannh@google.com>
To: jarkko.sakkinen@linux.intel.com
Cc: "the arch/x86 maintainers" <x86@kernel.org>,
platform-driver-x86@vger.kernel.org,
Dave Hansen <dave.hansen@intel.com>,
sean.j.christopherson@intel.com, nhorman@redhat.com,
npmccallum@redhat.com, linux-sgx@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H . Peter Anvin" <hpa@zytor.com>,
suresh.b.siddha@intel.com, serge.ayoun@intel.com,
kernel list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v13 10/13] x86/sgx: Add sgx_einit() for initializing enclaves
Date: Mon, 3 Sep 2018 15:53:24 +0200 [thread overview]
Message-ID: <CAG48ez2_EgP_-FcLV0g=EU2KuKEwFAmZufjGevMX4j--fJ_0+w@mail.gmail.com> (raw)
In-Reply-To: <20180827185507.17087-11-jarkko.sakkinen@linux.intel.com>
On Mon, Sep 3, 2018 at 3:33 PM Jarkko Sakkinen
<jarkko.sakkinen@linux.intel.com> wrote:
>
> From: Sean Christopherson <sean.j.christopherson@intel.com>
>
> Add a function to perform ENCLS(EINIT), which initializes an enclave,
> which can be used by a driver for running enclaves and VMMs.
>
> Writing the LE hash MSRs is extraordinarily expensive, e.g. 3-4x slower
> than normal MSRs, so we use a per-cpu cache to track the last known value
> of the MSRs to avoid unnecessarily writing the MSRs with the current value.
>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
> Co-developed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
[...]
> +/**
> + * sgx_einit - initialize an enclave
> + * @sigstruct: a pointer to the SIGSTRUCT
> + * @token: a pointer to the EINITTOKEN
> + * @secs_page: a pointer to the SECS EPC page
> + * @lepubkeyhash: the desired value for IA32_SGXLEPUBKEYHASHx MSRs
> + *
> + * Try to perform EINIT operation. If the MSRs are writable, they are updated
> + * according to @lepubkeyhash.
> + *
> + * Return:
> + * 0 on success,
> + * -errno on failure
> + * SGX error code if EINIT fails
> + */
> +int sgx_einit(struct sgx_sigstruct *sigstruct, struct sgx_einittoken *token,
> + struct sgx_epc_page *secs_page, u64 lepubkeyhash[4])
> +{
> + struct sgx_lepubkeyhash __percpu *cache;
> + bool cache_valid;
> + int i, ret;
> +
> + if (!sgx_lc_enabled)
> + return __einit(sigstruct, token, sgx_epc_addr(secs_page));
> +
> + cache = per_cpu(sgx_lepubkeyhash_cache, smp_processor_id());
At this point, preemption must be off, because smp_processor_id() is
called; I don't think it is off here? If you have hardware/emulation
on which you can test this, you may want to test your patches with
DEBUG_PREEMPT enabled.
> + if (!cache) {
> + cache = kzalloc(sizeof(struct sgx_lepubkeyhash), GFP_KERNEL);
But then here you do a GFP_KERNEL allocation, which can sleep.
Also: After "cache" has been allocated in this branch, when do you
store the reference to it? As far as I can tell, you never write to
sgx_lepubkeyhash_cache, and the allocation just leaks.
> + if (!cache)
> + return -ENOMEM;
> + }
> +
> + cache_valid = cache->pm_cnt == sgx_pm_cnt;
The cache should probably not be treated as valid if it has just been
created and only contains zeroes, right?
> + cache->pm_cnt = sgx_pm_cnt;
Can sgx_pm_cnt be modified concurrently? If so, please use at least
READ_ONCE() to document that and prevent the compiler from doing weird
stuff.
> + preempt_disable();
And here you turn off preemption, but it should already have been off?
> + for (i = 0; i < 4; i++) {
> + if (cache_valid && lepubkeyhash[i] == cache->msrs[i])
> + continue;
> +
> + wrmsrl(MSR_IA32_SGXLEPUBKEYHASH0 + i, lepubkeyhash[i]);
> + cache->msrs[i] = lepubkeyhash[i];
> + }
> + ret = __einit(sigstruct, token, sgx_epc_addr(secs_page));
> + preempt_enable();
> + return ret;
> +}
> +EXPORT_SYMBOL(sgx_einit);
> +
next prev parent reply other threads:[~2018-09-03 13:53 UTC|newest]
Thread overview: 103+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-27 18:53 [PATCH v13 00/13] Intel SGX1 support Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 01/13] x86/sgx: Update MAINTAINERS Jarkko Sakkinen
2018-09-03 12:56 ` Andy Shevchenko
2018-09-03 19:10 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 02/13] x86/cpufeature: Add SGX and SGX_LC CPU features Jarkko Sakkinen
2018-08-28 0:07 ` Huang, Kai
2018-08-28 7:17 ` Jarkko Sakkinen
2018-08-29 7:36 ` Huang, Kai
2018-08-31 12:19 ` Jarkko Sakkinen
2018-08-31 16:18 ` Dr. Greg
2018-08-27 18:53 ` [PATCH v13 03/13] x86/cpufeatures: Add Intel-defined SGX leaf CPUID_12_EAX Jarkko Sakkinen
2018-08-27 19:39 ` Dave Hansen
2018-08-28 7:23 ` Jarkko Sakkinen
2018-08-28 10:21 ` Borislav Petkov
2018-08-28 10:38 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 04/13] x86/sgx: Architectural structures Jarkko Sakkinen
2018-08-27 19:41 ` Dave Hansen
2018-08-28 8:08 ` Jarkko Sakkinen
2018-09-03 13:16 ` Andy Shevchenko
2018-09-03 19:17 ` Jarkko Sakkinen
2018-09-04 16:04 ` Dave Hansen
2018-09-04 16:06 ` Andy Shevchenko
2018-09-05 17:32 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 05/13] x86/msr: Add SGX definitions to msr-index.h Jarkko Sakkinen
2018-08-27 19:42 ` Dave Hansen
2018-08-28 8:11 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 06/13] x86/sgx: Detect Intel SGX Jarkko Sakkinen
2018-08-27 19:53 ` Dave Hansen
2018-08-28 8:28 ` Jarkko Sakkinen
2018-09-03 14:26 ` Andy Shevchenko
2018-09-04 9:56 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 07/13] x86/sgx: Add data structures for tracking the EPC pages Jarkko Sakkinen
2018-08-27 21:07 ` Dave Hansen
2018-08-28 10:30 ` Jarkko Sakkinen
2018-08-28 16:53 ` Dave Hansen
2018-08-28 21:34 ` Sean Christopherson
2018-08-31 11:13 ` Jarkko Sakkinen
2018-08-31 11:10 ` Jarkko Sakkinen
2018-09-03 14:41 ` Andy Shevchenko
2018-09-04 9:59 ` Jarkko Sakkinen
2018-09-04 17:49 ` Sean Christopherson
2018-09-04 18:01 ` Andy Shevchenko
2018-09-04 18:17 ` Sean Christopherson
2018-09-05 17:36 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 08/13] x86/sgx: Add wrappers for ENCLS leaf functions Jarkko Sakkinen
2018-09-03 15:01 ` Andy Shevchenko
2018-09-04 11:09 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 09/13] x86/sgx: Enclave Page Cache (EPC) memory manager Jarkko Sakkinen
2018-08-27 21:14 ` Dave Hansen
2018-08-28 8:36 ` Jarkko Sakkinen
2018-08-27 21:15 ` Dave Hansen
2018-08-28 8:35 ` Jarkko Sakkinen
2018-08-28 14:07 ` Dave Hansen
2018-08-28 21:22 ` Sean Christopherson
2018-08-28 21:26 ` Dave Hansen
2018-08-28 21:52 ` Sean Christopherson
2018-08-31 11:22 ` Jarkko Sakkinen
2018-09-03 19:02 ` Andy Shevchenko
2018-09-04 15:38 ` Jarkko Sakkinen
2018-09-04 15:45 ` Sean Christopherson
2018-09-11 15:04 ` Sean Christopherson
2018-09-16 11:40 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 10/13] x86/sgx: Add sgx_einit() for initializing enclaves Jarkko Sakkinen
2018-08-27 21:41 ` Huang, Kai
2018-08-28 7:01 ` Jarkko Sakkinen
2018-08-29 7:33 ` Huang, Kai
2018-08-29 20:33 ` Sean Christopherson
2018-08-29 20:58 ` Huang, Kai
2018-08-29 21:09 ` Sean Christopherson
2018-08-30 1:45 ` Huang, Kai
2018-08-31 17:43 ` Sean Christopherson
2018-08-31 21:34 ` Dr. Greg
2018-09-03 19:27 ` Jarkko Sakkinen
2018-09-03 18:15 ` Jarkko Sakkinen
2018-08-31 12:17 ` Jarkko Sakkinen
2018-08-31 18:15 ` Sean Christopherson
2018-09-03 19:19 ` Jarkko Sakkinen
2018-09-03 23:45 ` Huang, Kai
2018-09-04 14:54 ` Sean Christopherson
2018-09-04 15:30 ` Jarkko Sakkinen
2018-09-04 16:35 ` Sean Christopherson
2018-09-04 22:13 ` Huang, Kai
2018-09-05 17:39 ` Jarkko Sakkinen
2018-09-04 15:26 ` Jarkko Sakkinen
2018-09-03 13:53 ` Jann Horn [this message]
2018-09-04 9:55 ` Jarkko Sakkinen
2018-09-04 16:05 ` Andy Shevchenko
2018-08-27 18:53 ` [PATCH v13 11/13] platform/x86: Intel SGX driver Jarkko Sakkinen
2018-09-04 17:59 ` Andy Shevchenko
2018-09-05 17:33 ` Jarkko Sakkinen
2018-09-05 17:36 ` Andy Shevchenko
2018-09-06 9:21 ` Jarkko Sakkinen
2018-09-06 17:35 ` Miguel Ojeda
2018-09-07 0:50 ` Joe Perches
2018-09-07 17:02 ` Sean Christopherson
2018-09-10 18:37 ` Jarkko Sakkinen
2018-09-10 21:22 ` Joe Perches
2018-09-10 18:33 ` Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 12/13] platform/x86: ptrace() support for the " Jarkko Sakkinen
2018-08-27 18:53 ` [PATCH v13 13/13] x86/sgx: Driver documentation Jarkko Sakkinen
2018-08-27 19:40 ` Randy Dunlap
2018-08-28 7:58 ` Jarkko Sakkinen
2018-08-28 8:03 ` Jarkko Sakkinen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAG48ez2_EgP_-FcLV0g=EU2KuKEwFAmZufjGevMX4j--fJ_0+w@mail.gmail.com' \
--to=jannh@google.com \
--cc=dave.hansen@intel.com \
--cc=hpa@zytor.com \
--cc=jarkko.sakkinen@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sgx@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=nhorman@redhat.com \
--cc=npmccallum@redhat.com \
--cc=platform-driver-x86@vger.kernel.org \
--cc=sean.j.christopherson@intel.com \
--cc=serge.ayoun@intel.com \
--cc=suresh.b.siddha@intel.com \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).