* [PATCH linux-next v1 0/4] Add AVB Counter Clock @ 2018-10-25 7:23 jiada_wang 2018-10-25 7:23 ` [PATCH linux-next v1 1/4] clk: renesas: clk-avb: add AVB Clock driver jiada_wang ` (3 more replies) 0 siblings, 4 replies; 16+ messages in thread From: jiada_wang @ 2018-10-25 7:23 UTC (permalink / raw) To: geert+renesas, mturquette, sboyd, horms, magnus.damm, robh+dt, mark.rutland Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree, jiada_wang From: Jiada Wang <jiada_wang@mentor.com> on R-Car SoCs there are AVB Counter Clocks, each clock has 12bits integral and 8 bits fractional dividers which operates with S0D1ϕ clock. This patch set adds avb clock provider, which registers all 8 AVB Counter Clocks, and provide them via clock provider. AVB Clock node are added to R-Car ULCB and Salvator boards, so that like Audio Clock Generator (ADG) can use avb counter clocks via common clock framework. Jiada Wang (4): clk: renesas: clk-avb: add AVB Clock driver clk: renesas: Add binding document for AVB Counter Clock arm64: ulcb: Add avb counter clock arm64: salvator-common: Add avb counter clock .../bindings/clock/renesas,avb-clk.txt | 19 ++ .../boot/dts/renesas/salvator-common.dtsi | 6 + arch/arm64/boot/dts/renesas/ulcb.dtsi | 6 + drivers/clk/renesas/Kconfig | 6 + drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/clk-avb.c | 257 ++++++++++++++++++ 6 files changed, 295 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt create mode 100644 drivers/clk/renesas/clk-avb.c -- 2.17.0 ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH linux-next v1 1/4] clk: renesas: clk-avb: add AVB Clock driver 2018-10-25 7:23 [PATCH linux-next v1 0/4] Add AVB Counter Clock jiada_wang @ 2018-10-25 7:23 ` jiada_wang 2018-10-29 18:34 ` Stephen Boyd 2018-10-25 7:23 ` [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock jiada_wang ` (2 subsequent siblings) 3 siblings, 1 reply; 16+ messages in thread From: jiada_wang @ 2018-10-25 7:23 UTC (permalink / raw) To: geert+renesas, mturquette, sboyd, horms, magnus.damm, robh+dt, mark.rutland Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree, jiada_wang From: Jiada Wang <jiada_wang@mentor.com> There are AVB Counter Clocks, each clock has 12bits integral and 8 bits fractional dividers which operates with S0D1ϕ clock. This patch adds avb clock provider, which registers all 8 AVB Counter Clocks, and provide them via clock provider. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> --- drivers/clk/renesas/Kconfig | 6 + drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/clk-avb.c | 257 ++++++++++++++++++++++++++++++++++ 3 files changed, 264 insertions(+) create mode 100644 drivers/clk/renesas/clk-avb.c diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig index f998a7333acb..afa7b20b44a9 100644 --- a/drivers/clk/renesas/Kconfig +++ b/drivers/clk/renesas/Kconfig @@ -173,4 +173,10 @@ config CLK_RENESAS_CPG_MSTP config CLK_RENESAS_DIV6 bool "DIV6 clock support" if COMPILE_TEST +config CLK_RENESAS_CLK_AVB + bool "Renesas AVB Counter Clocks" + depends on CLK_RENESAS_CPG_MSSR + default y if ARCH_R8A7795 + default y if ARCH_R8A7796 + endif # CLK_RENESAS diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile index 71d4cafe15c0..17b05955e4f4 100644 --- a/drivers/clk/renesas/Makefile +++ b/drivers/clk/renesas/Makefile @@ -34,3 +34,4 @@ obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o obj-$(CONFIG_CLK_RENESAS_DIV6) += clk-div6.o +obj-$(CONFIG_CLK_RENESAS_CLK_AVB) += clk-avb.o diff --git a/drivers/clk/renesas/clk-avb.c b/drivers/clk/renesas/clk-avb.c new file mode 100644 index 000000000000..bb1eef0e9bee --- /dev/null +++ b/drivers/clk/renesas/clk-avb.c @@ -0,0 +1,257 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2017 Mentor + * + * Contact: Jiada Wang <jiada_wang@mentor.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * avb Common Clock Framework support + */ + +#include <linux/clk-provider.h> +#include <linux/of_address.h> +#include <linux/of_platform.h> +#include <linux/slab.h> + +struct clk_avb_data { + void __iomem *base; + + struct clk_onecell_data clk_data; + /* lock reg access */ + spinlock_t lock; +}; + +struct clk_avb { + struct clk_hw hw; + unsigned int idx; + struct clk_avb_data *data; +}; + +#define to_clk_avb(_hw) container_of(_hw, struct clk_avb, hw) + +#define AVB_DIV_MASK 0x3ffff +#define AVB_MAX_DIV 0x3ffc0 +#define AVB_COUNTER_MAX_FREQ 25000000 +#define AVB_COUNTER_NUM 8 +#define AVB_CLK_NAME_SIZE 10 +#define AVB_ID_TO_DIV(id) ((id) * 4) + +#define AVB_CLK_CONFIG 0x20 +#define AVB_DIV_EN_COM BIT(31) +#define AVB_CLK_NAME "avb" +#define ADG_CLK_NAME "adg" + +static int clk_avb_is_enabled(struct clk_hw *hw) +{ + struct clk_avb *avb = to_clk_avb(hw); + + return (clk_readl(avb->data->base + AVB_CLK_CONFIG) & BIT(avb->idx)); +} + +static int clk_avb_enabledisable(struct clk_hw *hw, int enable) +{ + struct clk_avb *avb = to_clk_avb(hw); + u32 val; + + spin_lock(&avb->data->lock); + + val = clk_readl(avb->data->base + AVB_CLK_CONFIG); + if (enable) + val |= BIT(avb->idx); + else + val &= ~BIT(avb->idx); + clk_writel(val, avb->data->base + AVB_CLK_CONFIG); + + spin_unlock(&avb->data->lock); + + return 0; +} + +static int clk_avb_enable(struct clk_hw *hw) +{ + return clk_avb_enabledisable(hw, 1); +} + +static void clk_avb_disable(struct clk_hw *hw) +{ + clk_avb_enabledisable(hw, 0); +} + +static unsigned long clk_avb_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_avb *avb = to_clk_avb(hw); + u32 div; + + div = clk_readl(avb->data->base + AVB_ID_TO_DIV(avb->idx)) & + AVB_DIV_MASK; + if (!div) + return parent_rate; + + return parent_rate * 32 / div; +} + +static unsigned int clk_avb_calc_div(unsigned long rate, + unsigned long parent_rate) +{ + unsigned int div; + + if (!rate) + rate = 1; + + if (rate > AVB_COUNTER_MAX_FREQ) + rate = AVB_COUNTER_MAX_FREQ; + + div = DIV_ROUND_CLOSEST(parent_rate * 32, rate); + + if (div > AVB_MAX_DIV) + div = AVB_MAX_DIV; + + return div; +} + +static long clk_avb_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + unsigned int div = clk_avb_calc_div(rate, *parent_rate); + + return (*parent_rate * 32) / div; +} + +static int clk_avb_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_avb *avb = to_clk_avb(hw); + unsigned int div = clk_avb_calc_div(rate, parent_rate); + u32 val; + + val = clk_readl(avb->data->base + AVB_ID_TO_DIV(avb->idx)) & + ~AVB_DIV_MASK; + clk_writel(val | div, avb->data->base + AVB_ID_TO_DIV(avb->idx)); + + return 0; +} + +static const struct clk_ops clk_avb_ops = { + .enable = clk_avb_enable, + .disable = clk_avb_disable, + .is_enabled = clk_avb_is_enabled, + .recalc_rate = clk_avb_recalc_rate, + .round_rate = clk_avb_round_rate, + .set_rate = clk_avb_set_rate, +}; + +static struct clk *clk_register_avb(struct clk_avb_data *data, + unsigned int id) +{ + struct clk_init_data init; + struct clk_avb *avb; + struct clk *clk; + char name[AVB_CLK_NAME_SIZE]; + const char *parent_name = ADG_CLK_NAME; + + avb = kzalloc(sizeof(*avb), GFP_KERNEL); + if (!avb) + return ERR_PTR(-ENOMEM); + + snprintf(name, AVB_CLK_NAME_SIZE, "%s.%u", AVB_CLK_NAME, id); + + avb->idx = id; + avb->data = data; + + /* Register the clock. */ + init.name = name; + init.ops = &clk_avb_ops; + init.flags = CLK_IS_BASIC; + init.parent_names = &parent_name; + init.num_parents = 1; + + avb->hw.init = &init; + + /* init DIV to a valid state */ + writel(AVB_MAX_DIV, data->base + AVB_ID_TO_DIV(avb->idx)); + + clk = clk_register(NULL, &avb->hw); + if (IS_ERR(clk)) + kfree(avb); + + return clk; +} + +static void clk_unregister_avb(struct clk *clk) +{ + struct clk_avb *avb; + struct clk_hw *hw; + + if (IS_ERR(clk)) + return; + + hw = __clk_get_hw(clk); + if (!hw) + return; + + avb = to_clk_avb(hw); + + clk_unregister(clk); + kfree(avb); +} + +static void __init clk_avb_setup(struct device_node *node) +{ + struct clk_avb_data *data; + struct clk_onecell_data *clk_data; + int ret, i; + struct resource res; + + data = kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) + return; + + data->base = of_io_request_and_map(node, 0, of_node_full_name(node)); + if (IS_ERR(data->base)) + goto err_data; + + spin_lock_init(&data->lock); + + clk_data = &data->clk_data; + clk_data->clk_num = AVB_COUNTER_NUM; + clk_data->clks = kmalloc_array(AVB_COUNTER_NUM, + sizeof(struct clk *), + GFP_KERNEL); + if (!clk_data->clks) + goto err_unmap; + + for (i = 0; i < AVB_COUNTER_NUM; i++) { + clk_data->clks[i] = clk_register_avb(data, i); + if (IS_ERR(clk_data->clks[i])) { + pr_err("failed to register clock %s.%d\n", + AVB_CLK_NAME, i); + goto err_clks; + } + } + + ret = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); + if (ret) { + pr_err("failed to register clock provider\n"); + goto err_clks; + } + + writel(AVB_DIV_EN_COM, data->base + AVB_CLK_CONFIG); + + return; + +err_clks: + for (i = 0; i < AVB_COUNTER_NUM; i++) + clk_unregister_avb(clk_data->clks[i]); +err_unmap: + iounmap(data->base); + of_address_to_resource(node, 0, &res); + release_mem_region(res.start, resource_size(&res)); +err_data: + kfree(data); +} + +CLK_OF_DECLARE(avb, "renesas,clk-avb", clk_avb_setup); -- 2.17.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 1/4] clk: renesas: clk-avb: add AVB Clock driver 2018-10-25 7:23 ` [PATCH linux-next v1 1/4] clk: renesas: clk-avb: add AVB Clock driver jiada_wang @ 2018-10-29 18:34 ` Stephen Boyd 0 siblings, 0 replies; 16+ messages in thread From: Stephen Boyd @ 2018-10-29 18:34 UTC (permalink / raw) To: geert+renesas, horms, jiada_wang, magnus.damm, mark.rutland, mturquette, robh+dt Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree, jiada_wang Quoting jiada_wang@mentor.com (2018-10-25 00:23:46) > diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile > index 71d4cafe15c0..17b05955e4f4 100644 > --- a/drivers/clk/renesas/Makefile > +++ b/drivers/clk/renesas/Makefile > @@ -34,3 +34,4 @@ obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o > obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o > obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o > obj-$(CONFIG_CLK_RENESAS_DIV6) += clk-div6.o > +obj-$(CONFIG_CLK_RENESAS_CLK_AVB) += clk-avb.o Any reason this can't be placed in some sort of alphabetical order instead of at the end of the file? > diff --git a/drivers/clk/renesas/clk-avb.c b/drivers/clk/renesas/clk-avb.c > new file mode 100644 > index 000000000000..bb1eef0e9bee > --- /dev/null > +++ b/drivers/clk/renesas/clk-avb.c > @@ -0,0 +1,257 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2017 Mentor > + * > + * Contact: Jiada Wang <jiada_wang@mentor.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; version 2 of the License. Can you remove this paragraph? It duplicates the SPDX tag. > + * > + * avb Common Clock Framework support > + */ > + > +#include <linux/clk-provider.h> > +#include <linux/of_address.h> > +#include <linux/of_platform.h> > +#include <linux/slab.h> > + > +struct clk_avb_data { > + void __iomem *base; > + > + struct clk_onecell_data clk_data; > + /* lock reg access */ > + spinlock_t lock; > +}; > + > +struct clk_avb { > + struct clk_hw hw; > + unsigned int idx; > + struct clk_avb_data *data; > +}; > + > +#define to_clk_avb(_hw) container_of(_hw, struct clk_avb, hw) > + > +#define AVB_DIV_MASK 0x3ffff > +#define AVB_MAX_DIV 0x3ffc0 > +#define AVB_COUNTER_MAX_FREQ 25000000 > +#define AVB_COUNTER_NUM 8 > +#define AVB_CLK_NAME_SIZE 10 > +#define AVB_ID_TO_DIV(id) ((id) * 4) > + > +#define AVB_CLK_CONFIG 0x20 > +#define AVB_DIV_EN_COM BIT(31) > +#define AVB_CLK_NAME "avb" > +#define ADG_CLK_NAME "adg" > + > +static int clk_avb_is_enabled(struct clk_hw *hw) > +{ > + struct clk_avb *avb = to_clk_avb(hw); > + > + return (clk_readl(avb->data->base + AVB_CLK_CONFIG) & BIT(avb->idx)); Please drop the extra parenthesis. > +} > + > +static int clk_avb_enabledisable(struct clk_hw *hw, int enable) > +{ > + struct clk_avb *avb = to_clk_avb(hw); > + u32 val; > + > + spin_lock(&avb->data->lock); > + > + val = clk_readl(avb->data->base + AVB_CLK_CONFIG); > + if (enable) > + val |= BIT(avb->idx); > + else > + val &= ~BIT(avb->idx); > + clk_writel(val, avb->data->base + AVB_CLK_CONFIG); > + > + spin_unlock(&avb->data->lock); > + > + return 0; > +} > + > +static int clk_avb_enable(struct clk_hw *hw) > +{ > + return clk_avb_enabledisable(hw, 1); > +} > + > +static void clk_avb_disable(struct clk_hw *hw) > +{ > + clk_avb_enabledisable(hw, 0); > +} > + > +static unsigned long clk_avb_recalc_rate(struct clk_hw *hw, > + unsigned long parent_rate) > +{ > + struct clk_avb *avb = to_clk_avb(hw); > + u32 div; > + > + div = clk_readl(avb->data->base + AVB_ID_TO_DIV(avb->idx)) & > + AVB_DIV_MASK; Split this to two lines: div = readl(...); div &= AVB_DIV_MASK; > + if (!div) > + return parent_rate; > + > + return parent_rate * 32 / div; > +} > + > +static unsigned int clk_avb_calc_div(unsigned long rate, > + unsigned long parent_rate) > +{ > + unsigned int div; > + > + if (!rate) > + rate = 1; > + > + if (rate > AVB_COUNTER_MAX_FREQ) > + rate = AVB_COUNTER_MAX_FREQ; rate = min(rate, AVB_COUNTER_MAX_FREQ); > + > + div = DIV_ROUND_CLOSEST(parent_rate * 32, rate); > + > + if (div > AVB_MAX_DIV) > + div = AVB_MAX_DIV; div = min(div, AVB_MAX_DIV); > + > + return div; > +} > + > +static long clk_avb_round_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long *parent_rate) > +{ > + unsigned int div = clk_avb_calc_div(rate, *parent_rate); > + > + return (*parent_rate * 32) / div; > +} > + > +static int clk_avb_set_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long parent_rate) > +{ > + struct clk_avb *avb = to_clk_avb(hw); > + unsigned int div = clk_avb_calc_div(rate, parent_rate); > + u32 val; > + > + val = clk_readl(avb->data->base + AVB_ID_TO_DIV(avb->idx)) & > + ~AVB_DIV_MASK; > + clk_writel(val | div, avb->data->base + AVB_ID_TO_DIV(avb->idx)); Any reason to use clk_readl/writel? Preferably these APIs aren't used and you just use readl/writel instead. > + > + return 0; > +} > + > +static const struct clk_ops clk_avb_ops = { > + .enable = clk_avb_enable, > + .disable = clk_avb_disable, > + .is_enabled = clk_avb_is_enabled, > + .recalc_rate = clk_avb_recalc_rate, > + .round_rate = clk_avb_round_rate, > + .set_rate = clk_avb_set_rate, > +}; > + > +static struct clk *clk_register_avb(struct clk_avb_data *data, > + unsigned int id) > +{ > + struct clk_init_data init; > + struct clk_avb *avb; > + struct clk *clk; > + char name[AVB_CLK_NAME_SIZE]; > + const char *parent_name = ADG_CLK_NAME; > + > + avb = kzalloc(sizeof(*avb), GFP_KERNEL); > + if (!avb) > + return ERR_PTR(-ENOMEM); > + > + snprintf(name, AVB_CLK_NAME_SIZE, "%s.%u", AVB_CLK_NAME, id); > + > + avb->idx = id; > + avb->data = data; > + > + /* Register the clock. */ > + init.name = name; > + init.ops = &clk_avb_ops; > + init.flags = CLK_IS_BASIC; > + init.parent_names = &parent_name; > + init.num_parents = 1; > + > + avb->hw.init = &init; > + > + /* init DIV to a valid state */ > + writel(AVB_MAX_DIV, data->base + AVB_ID_TO_DIV(avb->idx)); > + > + clk = clk_register(NULL, &avb->hw); > + if (IS_ERR(clk)) > + kfree(avb); > + > + return clk; > +} > + > +static void clk_unregister_avb(struct clk *clk) > +{ > + struct clk_avb *avb; > + struct clk_hw *hw; > + > + if (IS_ERR(clk)) > + return; > + > + hw = __clk_get_hw(clk); > + if (!hw) > + return; > + > + avb = to_clk_avb(hw); > + > + clk_unregister(clk); > + kfree(avb); Using clk_hw based registration APIs would make this a little cleaner. > +} > + > +static void __init clk_avb_setup(struct device_node *node) > +{ > + struct clk_avb_data *data; > + struct clk_onecell_data *clk_data; > + int ret, i; > + struct resource res; > + > + data = kzalloc(sizeof(*data), GFP_KERNEL); > + if (!data) > + return; > + > + data->base = of_io_request_and_map(node, 0, of_node_full_name(node)); > + if (IS_ERR(data->base)) > + goto err_data; > + > + spin_lock_init(&data->lock); > + > + clk_data = &data->clk_data; > + clk_data->clk_num = AVB_COUNTER_NUM; > + clk_data->clks = kmalloc_array(AVB_COUNTER_NUM, > + sizeof(struct clk *), > + GFP_KERNEL); > + if (!clk_data->clks) > + goto err_unmap; > + > + for (i = 0; i < AVB_COUNTER_NUM; i++) { > + clk_data->clks[i] = clk_register_avb(data, i); > + if (IS_ERR(clk_data->clks[i])) { > + pr_err("failed to register clock %s.%d\n", > + AVB_CLK_NAME, i); > + goto err_clks; > + } > + } > + > + ret = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); Can you use the clk_hw based registration and provider APIs? > + if (ret) { > + pr_err("failed to register clock provider\n"); > + goto err_clks; > + } > + > + writel(AVB_DIV_EN_COM, data->base + AVB_CLK_CONFIG); > + > + return; > + > +err_clks: > + for (i = 0; i < AVB_COUNTER_NUM; i++) > + clk_unregister_avb(clk_data->clks[i]); > +err_unmap: > + iounmap(data->base); > + of_address_to_resource(node, 0, &res); > + release_mem_region(res.start, resource_size(&res)); > +err_data: > + kfree(data); > +} > + > +CLK_OF_DECLARE(avb, "renesas,clk-avb", clk_avb_setup); Any reason to not use platform device APIs? If not, please change this to a platform driver. Otherwise, add a comment indicating why it can't be done. ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-10-25 7:23 [PATCH linux-next v1 0/4] Add AVB Counter Clock jiada_wang 2018-10-25 7:23 ` [PATCH linux-next v1 1/4] clk: renesas: clk-avb: add AVB Clock driver jiada_wang @ 2018-10-25 7:23 ` jiada_wang 2018-10-25 21:49 ` Rob Herring 2018-10-29 18:29 ` Stephen Boyd 2018-10-25 7:23 ` [PATCH linux-next v1 3/4] arm64: ulcb: Add avb counter clock jiada_wang 2018-10-25 7:23 ` [PATCH linux-next v1 4/4] arm64: salvator-common: " jiada_wang 3 siblings, 2 replies; 16+ messages in thread From: jiada_wang @ 2018-10-25 7:23 UTC (permalink / raw) To: geert+renesas, mturquette, sboyd, horms, magnus.damm, robh+dt, mark.rutland Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree, jiada_wang From: Jiada Wang <jiada_wang@mentor.com> Add device tree bindings for avb counter clock for Renesas R-Car Socs. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> --- .../bindings/clock/renesas,avb-clk.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt diff --git a/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt new file mode 100644 index 000000000000..03bf50b5830c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt @@ -0,0 +1,19 @@ +* Renesas AVB Counter Clock + +The AVB Counter Clocks are provided by avb_counter8 Clock Generator, +avb_counter8 has dividers which operates with S0D1ϕ clock and has +8 output clocks. + +Required Properties: + - compatible: Must be "renesas,clk-avb" + - reg: Base address and length of the memory resource used by the AVB + - #clock-cells: Must be 1 + +Example +------- + + clk_avb: avb-clock@ec5a011c { + compatible = "renesas,clk-avb"; + reg = <0 0xec5a011c 0 0x24>; + #clock-cells = <1>; + }; -- 2.17.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-10-25 7:23 ` [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock jiada_wang @ 2018-10-25 21:49 ` Rob Herring 2018-10-26 2:32 ` Jiada Wang 2018-10-29 18:29 ` Stephen Boyd 1 sibling, 1 reply; 16+ messages in thread From: Rob Herring @ 2018-10-25 21:49 UTC (permalink / raw) To: jiada_wang Cc: geert+renesas, mturquette, sboyd, horms, magnus.damm, mark.rutland, linux-kernel, linux-renesas-soc, linux-clk, devicetree On Thu, Oct 25, 2018 at 04:23:47PM +0900, jiada_wang@mentor.com wrote: > From: Jiada Wang <jiada_wang@mentor.com> > > Add device tree bindings for avb counter clock for Renesas > R-Car Socs. > > Signed-off-by: Jiada Wang <jiada_wang@mentor.com> > --- > .../bindings/clock/renesas,avb-clk.txt | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > > diff --git a/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > new file mode 100644 > index 000000000000..03bf50b5830c > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > @@ -0,0 +1,19 @@ > +* Renesas AVB Counter Clock > + > +The AVB Counter Clocks are provided by avb_counter8 Clock Generator, > +avb_counter8 has dividers which operates with S0D1ϕ clock and has > +8 output clocks. > + > +Required Properties: > + - compatible: Must be "renesas,clk-avb" Should be SoC specific? If the h/w block is called "AVB Counter" then use "avb-counter" in the compatible string. > + - reg: Base address and length of the memory resource used by the AVB > + - #clock-cells: Must be 1 > + > +Example > +------- > + > + clk_avb: avb-clock@ec5a011c { clock-controller@... > + compatible = "renesas,clk-avb"; > + reg = <0 0xec5a011c 0 0x24>; > + #clock-cells = <1>; > + }; > -- > 2.17.0 > ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-10-25 21:49 ` Rob Herring @ 2018-10-26 2:32 ` Jiada Wang 2018-10-29 13:14 ` Rob Herring 0 siblings, 1 reply; 16+ messages in thread From: Jiada Wang @ 2018-10-26 2:32 UTC (permalink / raw) To: Rob Herring Cc: geert+renesas, mturquette, sboyd, horms, magnus.damm, mark.rutland, linux-kernel, linux-renesas-soc, linux-clk, devicetree Hi Rob On 2018/10/26 6:49, Rob Herring wrote: > On Thu, Oct 25, 2018 at 04:23:47PM +0900, jiada_wang@mentor.com wrote: >> From: Jiada Wang <jiada_wang@mentor.com> >> >> Add device tree bindings for avb counter clock for Renesas >> R-Car Socs. >> >> Signed-off-by: Jiada Wang <jiada_wang@mentor.com> >> --- >> .../bindings/clock/renesas,avb-clk.txt | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt >> >> diff --git a/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt >> new file mode 100644 >> index 000000000000..03bf50b5830c >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt >> @@ -0,0 +1,19 @@ >> +* Renesas AVB Counter Clock >> + >> +The AVB Counter Clocks are provided by avb_counter8 Clock Generator, >> +avb_counter8 has dividers which operates with S0D1ϕ clock and has >> +8 output clocks. >> + >> +Required Properties: >> + - compatible: Must be "renesas,clk-avb" > Should be SoC specific? yes, avb counter clock is SoC specific, I will move avb clock node to Soc .dtsi in next version > > If the h/w block is called "AVB Counter" then use "avb-counter" in the > compatible string. will update compatible string >> + - reg: Base address and length of the memory resource used by the AVB >> + - #clock-cells: Must be 1 >> + >> +Example >> +------- >> + >> + clk_avb: avb-clock@ec5a011c { > clock-controller@... will replace with "clock-controller" Thanks, Jiada > >> + compatible = "renesas,clk-avb"; >> + reg = <0 0xec5a011c 0 0x24>; >> + #clock-cells = <1>; >> + }; >> -- >> 2.17.0 >> ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-10-26 2:32 ` Jiada Wang @ 2018-10-29 13:14 ` Rob Herring 0 siblings, 0 replies; 16+ messages in thread From: Rob Herring @ 2018-10-29 13:14 UTC (permalink / raw) To: Jiada Wang Cc: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Simon Horman, Magnus Damm, Mark Rutland, linux-kernel, open list:MEDIA DRIVERS FOR RENESAS - FCP, linux-clk, devicetree On Thu, Oct 25, 2018 at 9:32 PM Jiada Wang <jiada_wang@mentor.com> wrote: > > Hi Rob > > > On 2018/10/26 6:49, Rob Herring wrote: > > On Thu, Oct 25, 2018 at 04:23:47PM +0900, jiada_wang@mentor.com wrote: > >> From: Jiada Wang <jiada_wang@mentor.com> > >> > >> Add device tree bindings for avb counter clock for Renesas > >> R-Car Socs. > >> > >> Signed-off-by: Jiada Wang <jiada_wang@mentor.com> > >> --- > >> .../bindings/clock/renesas,avb-clk.txt | 19 +++++++++++++++++++ > >> 1 file changed, 19 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > >> > >> diff --git a/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > >> new file mode 100644 > >> index 000000000000..03bf50b5830c > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > >> @@ -0,0 +1,19 @@ > >> +* Renesas AVB Counter Clock > >> + > >> +The AVB Counter Clocks are provided by avb_counter8 Clock Generator, > >> +avb_counter8 has dividers which operates with S0D1ϕ clock and has > >> +8 output clocks. > >> + > >> +Required Properties: > >> + - compatible: Must be "renesas,clk-avb" > > Should be SoC specific? > yes, avb counter clock is SoC specific, I will move avb clock node to > Soc .dtsi in next version The compatible string should be SoC specific too then. Rob ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-10-25 7:23 ` [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock jiada_wang 2018-10-25 21:49 ` Rob Herring @ 2018-10-29 18:29 ` Stephen Boyd 2018-10-31 12:00 ` Jiada Wang 1 sibling, 1 reply; 16+ messages in thread From: Stephen Boyd @ 2018-10-29 18:29 UTC (permalink / raw) To: geert+renesas, horms, jiada_wang, magnus.damm, mark.rutland, mturquette, robh+dt Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree, jiada_wang Quoting jiada_wang@mentor.com (2018-10-25 00:23:47) > From: Jiada Wang <jiada_wang@mentor.com> > > Add device tree bindings for avb counter clock for Renesas > R-Car Socs. > > Signed-off-by: Jiada Wang <jiada_wang@mentor.com> > --- > .../bindings/clock/renesas,avb-clk.txt | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > > diff --git a/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > new file mode 100644 > index 000000000000..03bf50b5830c > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt > @@ -0,0 +1,19 @@ > +* Renesas AVB Counter Clock > + > +The AVB Counter Clocks are provided by avb_counter8 Clock Generator, > +avb_counter8 has dividers which operates with S0D1ϕ clock and has > +8 output clocks. > + > +Required Properties: > + - compatible: Must be "renesas,clk-avb" > + - reg: Base address and length of the memory resource used by the AVB > + - #clock-cells: Must be 1 > + > +Example > +------- > + > + clk_avb: avb-clock@ec5a011c { > + compatible = "renesas,clk-avb"; > + reg = <0 0xec5a011c 0 0x24>; This is an odd register offset. Is this just one clk inside of a larger clk controller? ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-10-29 18:29 ` Stephen Boyd @ 2018-10-31 12:00 ` Jiada Wang 2018-11-04 3:14 ` Stephen Boyd 0 siblings, 1 reply; 16+ messages in thread From: Jiada Wang @ 2018-10-31 12:00 UTC (permalink / raw) To: Stephen Boyd, geert+renesas, horms, magnus.damm, mark.rutland, mturquette, robh+dt Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree Hi Stephen Thanks for your comments On 2018/10/30 3:29, Stephen Boyd wrote: > Quoting jiada_wang@mentor.com (2018-10-25 00:23:47) >> From: Jiada Wang <jiada_wang@mentor.com> >> >> Add device tree bindings for avb counter clock for Renesas >> R-Car Socs. >> >> Signed-off-by: Jiada Wang <jiada_wang@mentor.com> >> --- >> .../bindings/clock/renesas,avb-clk.txt | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt >> >> diff --git a/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt >> new file mode 100644 >> index 000000000000..03bf50b5830c >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt >> @@ -0,0 +1,19 @@ >> +* Renesas AVB Counter Clock >> + >> +The AVB Counter Clocks are provided by avb_counter8 Clock Generator, >> +avb_counter8 has dividers which operates with S0D1ϕ clock and has >> +8 output clocks. >> + >> +Required Properties: >> + - compatible: Must be "renesas,clk-avb" >> + - reg: Base address and length of the memory resource used by the AVB >> + - #clock-cells: Must be 1 >> + >> +Example >> +------- >> + >> + clk_avb: avb-clock@ec5a011c { >> + compatible = "renesas,clk-avb"; >> + reg = <0 0xec5a011c 0 0x24>; > This is an odd register offset. Is this just one clk inside of a larger > clk controller? > Yes, avb_counter clock is part of Audio Clock Generator reg: <0 0xec5a0000 0 0x140>, but "adg" has already been declared in R-Car GEN2/GEN3 SoC .dtsi file, with reg: <0 0xec5a0000 0 0x100>, which leaves <0 0xec5a0100 0 0x140> currently not used by any module. Thanks, Jiada ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-10-31 12:00 ` Jiada Wang @ 2018-11-04 3:14 ` Stephen Boyd 2018-11-22 7:06 ` Jiada Wang 0 siblings, 1 reply; 16+ messages in thread From: Stephen Boyd @ 2018-11-04 3:14 UTC (permalink / raw) To: Jiada Wang, geert+renesas, horms, magnus.damm, mark.rutland, mturquette, robh+dt Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree Quoting Jiada Wang (2018-10-31 05:00:49) > On 2018/10/30 3:29, Stephen Boyd wrote: > > Quoting jiada_wang@mentor.com (2018-10-25 00:23:47) > >> +Required Properties: > >> + - compatible: Must be "renesas,clk-avb" > >> + - reg: Base address and length of the memory resource used by the AVB > >> + - #clock-cells: Must be 1 > >> + > >> +Example > >> +------- > >> + > >> + clk_avb: avb-clock@ec5a011c { > >> + compatible = "renesas,clk-avb"; > >> + reg = <0 0xec5a011c 0 0x24>; > > This is an odd register offset. Is this just one clk inside of a larger > > clk controller? > > > Yes, avb_counter clock is part of Audio Clock Generator reg: <0 > 0xec5a0000 0 0x140>, > but "adg" has already been declared in R-Car GEN2/GEN3 SoC .dtsi file, > with reg: <0 0xec5a0000 0 0x100>, > which leaves <0 0xec5a0100 0 0x140> currently not used by any module. > So why can't we expand the register size in the dts file and update the audio clock generator driver to register this avb clock too? Presumably the mapping is large enough to cover the clk registers already so it is more of a formality to expand the register size than a requirement. ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-11-04 3:14 ` Stephen Boyd @ 2018-11-22 7:06 ` Jiada Wang 2018-11-27 21:59 ` Stephen Boyd 0 siblings, 1 reply; 16+ messages in thread From: Jiada Wang @ 2018-11-22 7:06 UTC (permalink / raw) To: Stephen Boyd, geert+renesas, horms, magnus.damm, mark.rutland, mturquette, robh+dt Cc: linux-kernel, linux-renesas-soc, linux-clk, kuninori.morimoto.gx Hi Stephen On 2018/11/04 12:14, Stephen Boyd wrote: > Quoting Jiada Wang (2018-10-31 05:00:49) >> On 2018/10/30 3:29, Stephen Boyd wrote: >>> Quoting jiada_wang@mentor.com (2018-10-25 00:23:47) >>>> +Required Properties: >>>> + - compatible: Must be "renesas,clk-avb" >>>> + - reg: Base address and length of the memory resource used by the AVB >>>> + - #clock-cells: Must be 1 >>>> + >>>> +Example >>>> +------- >>>> + >>>> + clk_avb: avb-clock@ec5a011c { >>>> + compatible = "renesas,clk-avb"; >>>> + reg = <0 0xec5a011c 0 0x24>; >>> This is an odd register offset. Is this just one clk inside of a larger >>> clk controller? >>> >> Yes, avb_counter clock is part of Audio Clock Generator reg: <0 >> 0xec5a0000 0 0x140>, >> but "adg" has already been declared in R-Car GEN2/GEN3 SoC .dtsi file, >> with reg: <0 0xec5a0000 0 0x100>, >> which leaves <0 0xec5a0100 0 0x140> currently not used by any module. >> > So why can't we expand the register size in the dts file and update the > audio clock generator driver to register this avb clock too? Presumably > the mapping is large enough to cover the clk registers already so it is > more of a formality to expand the register size than a requirement. I am working on ver2 to expend register size to cover <0 0xec5a0100 0 0x140> in audio clock generator (ADG) driver, but as provider of newly added "AVB_COUNTER" clock, ADG driver also uses these clocks if necessary, so it keeps itself BUSY, and cause ADG driver can't be unloaded. my question is, is such use case allowed? (clock provider is also client of clocks). Thanks, Jiada ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock 2018-11-22 7:06 ` Jiada Wang @ 2018-11-27 21:59 ` Stephen Boyd 0 siblings, 0 replies; 16+ messages in thread From: Stephen Boyd @ 2018-11-27 21:59 UTC (permalink / raw) To: Jiada Wang, geert+renesas, horms, magnus.damm, mark.rutland, mturquette, robh+dt Cc: linux-kernel, linux-renesas-soc, linux-clk, kuninori.morimoto.gx Quoting Jiada Wang (2018-11-21 23:06:10) > On 2018/11/04 12:14, Stephen Boyd wrote: > > Quoting Jiada Wang (2018-10-31 05:00:49) > >> On 2018/10/30 3:29, Stephen Boyd wrote: > >>> Quoting jiada_wang@mentor.com (2018-10-25 00:23:47) > >>>> +Required Properties: > >>>> + - compatible: Must be "renesas,clk-avb" > >>>> + - reg: Base address and length of the memory resource used by the AVB > >>>> + - #clock-cells: Must be 1 > >>>> + > >>>> +Example > >>>> +------- > >>>> + > >>>> + clk_avb: avb-clock@ec5a011c { > >>>> + compatible = "renesas,clk-avb"; > >>>> + reg = <0 0xec5a011c 0 0x24>; > >>> This is an odd register offset. Is this just one clk inside of a larger > >>> clk controller? > >>> > >> Yes, avb_counter clock is part of Audio Clock Generator reg: <0 > >> 0xec5a0000 0 0x140>, > >> but "adg" has already been declared in R-Car GEN2/GEN3 SoC .dtsi file, > >> with reg: <0 0xec5a0000 0 0x100>, > >> which leaves <0 0xec5a0100 0 0x140> currently not used by any module. > >> > > So why can't we expand the register size in the dts file and update the > > audio clock generator driver to register this avb clock too? Presumably > > the mapping is large enough to cover the clk registers already so it is > > more of a formality to expand the register size than a requirement. > I am working on ver2 to expend register size to cover <0 0xec5a0100 0 0x140> > in audio clock generator (ADG) driver, but as provider of newly added > "AVB_COUNTER" clock, > ADG driver also uses these clocks if necessary, so it keeps itself BUSY, > and cause ADG driver can't be unloaded. > my question is, is such use case allowed? (clock provider is also client > of clocks). Yes, a clock provider can also be a client of clocks. ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH linux-next v1 3/4] arm64: ulcb: Add avb counter clock 2018-10-25 7:23 [PATCH linux-next v1 0/4] Add AVB Counter Clock jiada_wang 2018-10-25 7:23 ` [PATCH linux-next v1 1/4] clk: renesas: clk-avb: add AVB Clock driver jiada_wang 2018-10-25 7:23 ` [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock jiada_wang @ 2018-10-25 7:23 ` jiada_wang 2018-10-25 20:22 ` Geert Uytterhoeven 2018-10-25 7:23 ` [PATCH linux-next v1 4/4] arm64: salvator-common: " jiada_wang 3 siblings, 1 reply; 16+ messages in thread From: jiada_wang @ 2018-10-25 7:23 UTC (permalink / raw) To: geert+renesas, mturquette, sboyd, horms, magnus.damm, robh+dt, mark.rutland Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree, jiada_wang From: Jiada Wang <jiada_wang@mentor.com> Add avb counter clock node to R-Car ULCB boards Signed-off-by: Jiada Wang <jiada_wang@mentor.com> --- arch/arm64/boot/dts/renesas/ulcb.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi index 89daca7356df..698f933d4cec 100644 --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi @@ -32,6 +32,12 @@ clock-frequency = <12288000>; }; + clk_avb: avb-clock@ec5a011c { + compatible = "renesas,clk-avb"; + reg = <0 0xec5a011c 0 0x24>; + #clock-cells = <1>; + }; + hdmi0-out { compatible = "hdmi-connector"; type = "a"; -- 2.17.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 3/4] arm64: ulcb: Add avb counter clock 2018-10-25 7:23 ` [PATCH linux-next v1 3/4] arm64: ulcb: Add avb counter clock jiada_wang @ 2018-10-25 20:22 ` Geert Uytterhoeven 2018-10-26 2:19 ` Jiada Wang 0 siblings, 1 reply; 16+ messages in thread From: Geert Uytterhoeven @ 2018-10-25 20:22 UTC (permalink / raw) To: Jiada Wang Cc: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Simon Horman, Magnus Damm, Rob Herring, Mark Rutland, Linux Kernel Mailing List, Linux-Renesas, linux-clk, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS Hi Jiada, On Thu, Oct 25, 2018 at 9:24 AM <jiada_wang@mentor.com> wrote: > From: Jiada Wang <jiada_wang@mentor.com> > > Add avb counter clock node to R-Car ULCB boards > > Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi > +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi > @@ -32,6 +32,12 @@ > clock-frequency = <12288000>; > }; > > + clk_avb: avb-clock@ec5a011c { > + compatible = "renesas,clk-avb"; > + reg = <0 0xec5a011c 0 0x24>; > + #clock-cells = <1>; > + }; > + > hdmi0-out { > compatible = "hdmi-connector"; > type = "a"; Why would this belong in the board .dtsi, not in the SoC .dtsi? (same for salvator-common.dtsi) How is this intended to be used by the AVB? Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH linux-next v1 3/4] arm64: ulcb: Add avb counter clock 2018-10-25 20:22 ` Geert Uytterhoeven @ 2018-10-26 2:19 ` Jiada Wang 0 siblings, 0 replies; 16+ messages in thread From: Jiada Wang @ 2018-10-26 2:19 UTC (permalink / raw) To: Geert Uytterhoeven Cc: Geert Uytterhoeven, Michael Turquette, Stephen Boyd, Simon Horman, Magnus Damm, Rob Herring, Mark Rutland, Linux Kernel Mailing List, Linux-Renesas, linux-clk, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS Hi Geert Thanks for your comment On 2018/10/26 5:22, Geert Uytterhoeven wrote: > Hi Jiada, > > On Thu, Oct 25, 2018 at 9:24 AM <jiada_wang@mentor.com> wrote: >> From: Jiada Wang <jiada_wang@mentor.com> >> >> Add avb counter clock node to R-Car ULCB boards >> >> Signed-off-by: Jiada Wang <jiada_wang@mentor.com> > Thanks for your patch! > >> --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi >> +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi >> @@ -32,6 +32,12 @@ >> clock-frequency = <12288000>; >> }; >> >> + clk_avb: avb-clock@ec5a011c { >> + compatible = "renesas,clk-avb"; >> + reg = <0 0xec5a011c 0 0x24>; >> + #clock-cells = <1>; >> + }; >> + >> hdmi0-out { >> compatible = "hdmi-connector"; >> type = "a"; > Why would this belong in the board .dtsi, not in the SoC .dtsi? > (same for salvator-common.dtsi) right, it belongs to Soc .dtsi, I will move it to each Soc .dtsi > How is this intended to be used by the AVB? R-Car audio can use AVB clock to support continuous clock rate, with out AVB clock, currently only limited rates are supports by R-Car audio Thanks, Jiada > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH linux-next v1 4/4] arm64: salvator-common: Add avb counter clock 2018-10-25 7:23 [PATCH linux-next v1 0/4] Add AVB Counter Clock jiada_wang ` (2 preceding siblings ...) 2018-10-25 7:23 ` [PATCH linux-next v1 3/4] arm64: ulcb: Add avb counter clock jiada_wang @ 2018-10-25 7:23 ` jiada_wang 3 siblings, 0 replies; 16+ messages in thread From: jiada_wang @ 2018-10-25 7:23 UTC (permalink / raw) To: geert+renesas, mturquette, sboyd, horms, magnus.damm, robh+dt, mark.rutland Cc: linux-kernel, linux-renesas-soc, linux-clk, devicetree, jiada_wang From: Jiada Wang <jiada_wang@mentor.com> Add avb counter clock node to R-Car Salvator boards Signed-off-by: Jiada Wang <jiada_wang@mentor.com> --- arch/arm64/boot/dts/renesas/salvator-common.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi index 7f91ff524109..09a228d04b9e 100644 --- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi +++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi @@ -63,6 +63,12 @@ enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; }; + clk_avb: avb-clock@ec5a011c { + compatible = "renesas,clk-avb"; + reg = <0 0xec5a011c 0 0x24>; + #clock-cells = <1>; + }; + cvbs-in { compatible = "composite-video-connector"; label = "CVBS IN"; -- 2.17.0 ^ permalink raw reply related [flat|nested] 16+ messages in thread
end of thread, other threads:[~2018-11-27 21:59 UTC | newest] Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-10-25 7:23 [PATCH linux-next v1 0/4] Add AVB Counter Clock jiada_wang 2018-10-25 7:23 ` [PATCH linux-next v1 1/4] clk: renesas: clk-avb: add AVB Clock driver jiada_wang 2018-10-29 18:34 ` Stephen Boyd 2018-10-25 7:23 ` [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock jiada_wang 2018-10-25 21:49 ` Rob Herring 2018-10-26 2:32 ` Jiada Wang 2018-10-29 13:14 ` Rob Herring 2018-10-29 18:29 ` Stephen Boyd 2018-10-31 12:00 ` Jiada Wang 2018-11-04 3:14 ` Stephen Boyd 2018-11-22 7:06 ` Jiada Wang 2018-11-27 21:59 ` Stephen Boyd 2018-10-25 7:23 ` [PATCH linux-next v1 3/4] arm64: ulcb: Add avb counter clock jiada_wang 2018-10-25 20:22 ` Geert Uytterhoeven 2018-10-26 2:19 ` Jiada Wang 2018-10-25 7:23 ` [PATCH linux-next v1 4/4] arm64: salvator-common: " jiada_wang
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