From: Gabriele Paoloni <gabriele.paoloni@huawei.com>
To: Arnd Bergmann <arnd@arndb.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Cc: Yuanzhichang <yuanzhichang@hisilicon.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
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"minyard@acm.org" <minyard@acm.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"benh@kernel.crashing.org" <benh@kernel.crashing.org>,
John Garry <john.garry@huawei.com>,
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"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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Subject: RE: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06
Date: Thu, 10 Nov 2016 15:36:49 +0000 [thread overview]
Message-ID: <EE11001F9E5DDD47B7634E2F8A612F2E1F8F5D75@lhreml507-mbx> (raw)
In-Reply-To: <17821285.aIcTyCGn5n@wuerfel>
Hi Arnd
> -----Original Message-----
> From: Arnd Bergmann [mailto:arnd@arndb.de]
> Sent: 10 November 2016 09:12
> To: linux-arm-kernel@lists.infradead.org
> Cc: Yuanzhichang; mark.rutland@arm.com; devicetree@vger.kernel.org;
> lorenzo.pieralisi@arm.com; Gabriele Paoloni; minyard@acm.org; linux-
> pci@vger.kernel.org; benh@kernel.crashing.org; John Garry;
> will.deacon@arm.com; linux-kernel@vger.kernel.org; xuwei (O); Linuxarm;
> zourongrong@gmail.com; robh+dt@kernel.org; kantyzc@163.com; linux-
> serial@vger.kernel.org; catalin.marinas@arm.com; olof@lixom.net;
> liviu.dudau@arm.com; bhelgaas@google.com; zhichang.yuan02@gmail.com
> Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on
> Hip06
>
> On Thursday, November 10, 2016 2:40:26 PM CET zhichang.yuan wrote:
> > On 2016/11/10 5:34, Arnd Bergmann wrote:
> > > On Wednesday, November 9, 2016 12:10:43 PM CET Gabriele Paoloni
> wrote:
> > >>> On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote:
> > >>>> + /*
> > >>>> + * The first PCIBIOS_MIN_IO is reserved specifically for
> > >>> indirectIO.
> > >>>> + * It will separate indirectIO range from pci host
> bridge to
> > >>>> + * avoid the possible PIO conflict.
> > >>>> + * Set the indirectIO range directly here.
> > >>>> + */
> > >>>> + lpcdev->io_ops.start = 0;
> > >>>> + lpcdev->io_ops.end = PCIBIOS_MIN_IO - 1;
> > >>>> + lpcdev->io_ops.devpara = lpcdev;
> > >>>> + lpcdev->io_ops.pfin = hisilpc_comm_in;
> > >>>> + lpcdev->io_ops.pfout = hisilpc_comm_out;
> > >>>> + lpcdev->io_ops.pfins = hisilpc_comm_ins;
> > >>>> + lpcdev->io_ops.pfouts = hisilpc_comm_outs;
> > >>>
> > >>> I have to look at patch 2 in more detail again, after missing a
> few
> > >>> review
> > >>> rounds. I'm still a bit skeptical about hardcoding a logical I/O
> port
> > >>> range here, and would hope that we can just go through the same
> > >>> assignment of logical port ranges that we have for PCI buses,
> > >>> decoupling
> > >>> the bus addresses from the linux-internal ones.
> > >>
> > >> The point here is that we want to avoid any conflict/overlap
> between
> > >> the LPC I/O space and the PCI I/O space. With the assignment above
> > >> we make sure that LPC never interfere with PCI I/O space.
> > >
> > > But we already abstract the PCI I/O space using dynamic
> registration.
> > > There is no need to hardcode the logical address for ISA, though
> > > I think we can hardcode the bus address to start at zero here.
> >
> > Do you means that we can pick up the maximal I/O address from all
> children's
> > device resources??
>
> The driver should not look at the resources of its children, just
> register a range of addresses dynamically, as I suggested in an
> earlier review.
Where should we get the range from? For LPC we know that it is going
Work on anything that is not used by PCI I/O space, and this is
why we use [0, PCIBIOS_MIN_IO]
>
>
> Your current version has
>
> if (arm64_extio_ops->pfout) \
> arm64_extio_ops->pfout(arm64_extio_ops->devpara,\
> addr, value, sizeof(type)); \
>
> Instead, just subtract the start of the range from the logical
> port number to transform it back into a bus-local port number:
These accessors do not operate on IO tokens:
If (arm64_extio_ops->start > addr || arm64_extio_ops->end < addr)
addr is not going to be an I/O token; in fact patch 2/3 imposes that
the I/O tokens will start at PCIBIOS_MIN_IO. So from 0 to PCIBIOS_MIN_IO
we have free physical addresses that the accessors can operate on.
Thanks
Gab
>
> if (arm64_extio_ops->pfout) \
> arm64_extio_ops->pfout(arm64_extio_ops->devpara,\
> addr - arm64_extio_ops->start, value,
> sizeof(type)); \
>
> We know that the ISA/LPC bus can only have up to 65536 ports,
> so you can register all of those, or possibly limit it further to
> 1024 or 4096 ports, whichever matches the bus implementation.
>
> Arnd
next prev parent reply other threads:[~2016-11-10 15:37 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-08 3:47 [PATCH V5 0/3] ARM64 LPC: legacy ISA I/O support zhichang.yuan
2016-11-08 3:47 ` [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced zhichang.yuan
2016-11-08 12:03 ` Mark Rutland
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:15 ` Arnd Bergmann
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 11:22 ` Mark Rutland
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-11 10:07 ` zhichang.yuan
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:38 ` Arnd Bergmann
2016-11-21 12:58 ` John Garry
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:33 ` John Garry
2016-11-08 16:49 ` Will Deacon
2016-11-08 17:05 ` John Garry
2016-11-08 22:35 ` Arnd Bergmann
2016-11-09 11:29 ` John Garry
2016-11-09 21:33 ` Arnd Bergmann
2016-12-22 8:15 ` Ming Lei
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 7:24 ` Ming Lei
2017-01-06 11:43 ` Arnd Bergmann
2016-11-08 3:47 ` [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA zhichang.yuan
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 11:49 ` Mark Rutland
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 17:10 ` Mark Rutland
2016-11-09 13:54 ` One Thousand Gnomes
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 21:38 ` Arnd Bergmann
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-18 9:22 ` Arnd Bergmann
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-09 11:20 ` Mark Rutland
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-09 11:39 ` liviu.dudau
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:50 ` liviu.dudau
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-11 10:37 ` liviu.dudau
2016-11-08 3:47 ` [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06 zhichang.yuan
2016-11-08 6:11 ` kbuild test robot
2016-11-08 16:24 ` Arnd Bergmann
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 21:34 ` Arnd Bergmann
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 12:36 ` zhichang.yuan
2016-11-18 11:46 ` Arnd Bergmann
2016-11-10 15:36 ` Gabriele Paoloni [this message]
2016-11-10 16:07 ` Arnd Bergmann
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:48 ` liviu.dudau
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 14:45 ` liviu.dudau
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 18:16 ` liviu.dudau
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 11:26 ` liviu.dudau
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 10:24 ` Arnd Bergmann
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-11 16:54 ` zhichang.yuan
2016-11-14 11:06 ` One Thousand Gnomes
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