From: Andrew Lunn <andrew@lunn.ch>
To: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Woojung Huh <woojung.huh@microchip.com>,
UNGLinuxDriver@microchip.com,
Florian Fainelli <f.fainelli@gmail.com>,
Vivien Didelot <vivien.didelot@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Michael Grzeschik <m.grzeschik@pengutronix.de>,
kernel@pengutronix.de, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org,
Russell King <linux@armlinux.org.uk>
Subject: Re: [RFC PATCH v1 1/9] net: phy: micrel: move phy reg offsets to common header
Date: Wed, 5 May 2021 14:24:31 +0200 [thread overview]
Message-ID: <YJKOf3hs/ApJt3hz@lunn.ch> (raw)
In-Reply-To: <20210505092025.8785-2-o.rempel@pengutronix.de>
> +#define PHY_REG_CTRL 0
MII_BMCR
> +
> +#define PHY_RESET BIT(15)
> +#define PHY_LOOPBACK BIT(14)
> +#define PHY_SPEED_100MBIT BIT(13)
> +#define PHY_AUTO_NEG_ENABLE BIT(12)
> +#define PHY_POWER_DOWN BIT(11)
> +#define PHY_MII_DISABLE BIT(10)
> +#define PHY_AUTO_NEG_RESTART BIT(9)
> +#define PHY_FULL_DUPLEX BIT(8)
> +#define PHY_COLLISION_TEST_NOT BIT(7)
All the above appear to be standard BMCR bits. Please use the existing
#defines in include/uapi/linux/mii.h
> +#define PHY_HP_MDIX BIT(5)
> +#define PHY_FORCE_MDIX BIT(4)
> +#define PHY_AUTO_MDIX_DISABLE BIT(3)
> +#define PHY_REMOTE_FAULT_DISABLE BIT(2)
> +#define PHY_TRANSMIT_DISABLE BIT(1)
> +#define PHY_LED_DISABLE BIT(0)
Since you are moving into a global scope header, please add a device
prefix.
> +
> +#define PHY_REG_STATUS 1
MII_BMSR
> +
> +#define PHY_100BT4_CAPABLE BIT(15)
> +#define PHY_100BTX_FD_CAPABLE BIT(14)
> +#define PHY_100BTX_CAPABLE BIT(13)
> +#define PHY_10BT_FD_CAPABLE BIT(12)
> +#define PHY_10BT_CAPABLE BIT(11)
> +#define PHY_MII_SUPPRESS_CAPABLE_NOT BIT(6)
> +#define PHY_AUTO_NEG_ACKNOWLEDGE BIT(5)
> +#define PHY_REMOTE_FAULT BIT(4)
> +#define PHY_AUTO_NEG_CAPABLE BIT(3)
> +#define PHY_LINK_STATUS BIT(2)
> +#define PHY_JABBER_DETECT_NOT BIT(1)
> +#define PHY_EXTENDED_CAPABILITY BIT(0)
These also look to be pretty standard BMSR defines.
> +
> +#define PHY_REG_ID_1 2
> +#define PHY_REG_ID_2 3
MII_PHYSID1 & MII_PHYSID2
Please remove everything which directly matches the existing defines.
Just add defines for bits which don't follow 802.3 c22.
Andrew
next prev parent reply other threads:[~2021-05-05 12:24 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-05 9:20 [RFC PATCH v1 0/9] provide cable test support for the ksz886x Oleksij Rempel
2021-05-05 9:20 ` [RFC PATCH v1 1/9] net: phy: micrel: move phy reg offsets to common header Oleksij Rempel
2021-05-05 12:24 ` Andrew Lunn [this message]
2021-05-05 9:20 ` [RFC PATCH v1 2/9] net: dsa: microchip: ksz8795: add phylink support Oleksij Rempel
2021-05-06 12:13 ` Vladimir Oltean
2021-05-06 13:05 ` Oleksij Rempel
2021-05-06 13:28 ` Vladimir Oltean
2021-05-10 9:02 ` Oleksij Rempel
2021-05-05 9:20 ` [RFC PATCH v1 3/9] net: phy: micrel: use consistent indention after define Oleksij Rempel
2021-05-05 9:20 ` [RFC PATCH v1 4/9] net: phy: micrel: apply resume errata workaround for ksz8873 and ksz8863 Oleksij Rempel
2021-05-05 9:20 ` [RFC PATCH v1 5/9] net: phy: micrel: ksz886x add MDI-X support Oleksij Rempel
2021-05-05 12:37 ` Andrew Lunn
2021-05-10 9:10 ` Oleksij Rempel
2021-05-05 9:20 ` [RFC PATCH v1 6/9] net: phy: micrel: ksz8081 " Oleksij Rempel
2021-05-05 9:20 ` [RFC PATCH v1 7/9] net: dsa: microchip: ksz8795: add LINK_MD register support Oleksij Rempel
2021-05-05 9:20 ` [RFC PATCH v1 8/9] net: phy: micrel: ksz886x/ksz8081: add cabletest support Oleksij Rempel
2021-05-05 12:47 ` Andrew Lunn
2021-05-10 9:06 ` Oleksij Rempel
2021-05-10 12:44 ` Andrew Lunn
2021-05-05 9:20 ` [RFC PATCH v1 9/9] net: phy: micrel: add patch for erratas on port1 Oleksij Rempel
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