From: "Maciej W. Rozycki" <macro@linux-mips.org>
To: Jinyang He <hejinyang@loongson.cn>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] MIPS: KASLR: Fix sync_icache() trapped in loop when synci_step is zero
Date: Tue, 8 Dec 2020 06:46:41 +0000 (GMT) [thread overview]
Message-ID: <alpine.LFD.2.21.2012071716470.2104409@eddie.linux-mips.org> (raw)
In-Reply-To: <642b9149-6de5-fa04-80e2-aed7367b3cce@loongson.cn>
On Thu, 3 Dec 2020, Jinyang He wrote:
> Thus, only one synci operation is required when synci_step is 0
> on Loongson64 platform. I guess that some other platforms have
> similar implementations on synci, so add judgment conditions in
> `while` to ensure that at least all platforms perform synci
> operations once. For those platforms that do not need synci,
> they just do one more operation similar to nop.
This is non-compliant and looks to me like a risky choice for what was
invented to guarantee portability across all MIPS systems. Compliant
software will fail with Loongson64 processors unless patched like this
piece, and you don't really have control over all user software out there
(I would expect issues with JIT engines and the like).
If only a single SYNCI operation is ever required why wasn't SYNCI_Step
set to some large value instead that would in reality prevent looping over
SYNCI from happening?
Maciej
next prev parent reply other threads:[~2020-12-08 6:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 3:00 [PATCH] MIPS: KASLR: Fix sync_icache() trapped in loop when synci_step is zero Jinyang He
2020-12-02 10:39 ` Thomas Bogendoerfer
2020-12-03 3:29 ` Jinyang He
2020-12-08 6:46 ` Maciej W. Rozycki [this message]
2020-12-03 4:02 ` Jiaxun Yang
2020-12-04 12:14 ` Thomas Bogendoerfer
2020-12-07 15:35 ` Maciej W. Rozycki
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