From: Maxime Ripard <maxime@cerno.tech>
To: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
Eric Anholt <eric@anholt.net>
Cc: dri-devel@lists.freedesktop.org,
linux-rpi-kernel@lists.infradead.org,
bcm-kernel-feedback-list@broadcom.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Dave Stevenson <dave.stevenson@raspberrypi.com>,
Tim Gover <tim.gover@raspberrypi.com>,
Phil Elwell <phil@raspberrypi.com>,
Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH v3 059/105] drm/vc4: crtc: Add BCM2711 pixelvalves
Date: Wed, 27 May 2020 17:48:29 +0200 [thread overview]
Message-ID: <eb489952ba212a84dbe3d369371c0ee75b9a2d3e.1590594512.git-series.maxime@cerno.tech> (raw)
In-Reply-To: <cover.aaf2100bd7da4609f8bcb8216247d4b4e4379639.1590594512.git-series.maxime@cerno.tech>
The BCM2711 has 5 pixelvalves, so now that our driver is ready, let's add
support for them.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 84 ++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/vc4/vc4_regs.h | 6 +++-
2 files changed, 88 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 9efd7cb25590..a577ed8f929f 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -229,6 +229,13 @@ static u32 vc4_get_fifo_full_level(struct vc4_crtc *vc4_crtc, u32 format)
case PV_CONTROL_FORMAT_24:
case PV_CONTROL_FORMAT_DSIV_24:
default:
+ /*
+ * For some reason, the pixelvalve4 doesn't work with
+ * the usual formula and will only work with 32.
+ */
+ if (vc4_crtc->data->hvs_output == 5)
+ return 32;
+
return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX;
}
}
@@ -237,9 +244,14 @@ static u32 vc4_crtc_get_fifo_full_level_bits(struct vc4_crtc *vc4_crtc,
u32 format)
{
u32 level = vc4_get_fifo_full_level(vc4_crtc, format);
+ u32 ret = 0;
- return VC4_SET_FIELD(level & 0x3f,
- PV_CONTROL_FIFO_LEVEL);
+ if (level > 0x3f)
+ ret |= VC4_SET_FIELD((level >> 6) & 0x3,
+ PV5_CONTROL_FIFO_LEVEL_HIGH);
+
+ return ret | VC4_SET_FIELD(level & 0x3f,
+ PV_CONTROL_FIFO_LEVEL);
}
/*
@@ -277,6 +289,8 @@ static void vc4_crtc_pixelvalve_reset(struct drm_crtc *crtc)
static void vc4_crtc_config_pv(struct drm_crtc *crtc)
{
+ struct drm_device *dev = crtc->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
@@ -356,6 +370,10 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc)
if (is_dsi)
CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep);
+ if (vc4->hvs->hvs5)
+ CRTC_WRITE(PV_MUX_CFG,
+ VC4_SET_FIELD(8, PV_MUX_CFG_RGB_PIXEL_MUX_MODE));
+
CRTC_WRITE(PV_CONTROL, PV_CONTROL_FIFO_CLR |
vc4_crtc_get_fifo_full_level_bits(vc4_crtc, format) |
VC4_SET_FIELD(format, PV_CONTROL_FORMAT) |
@@ -904,10 +922,72 @@ static const struct vc4_crtc_data bcm2835_pv2_data = {
},
};
+static const struct vc4_crtc_data bcm2711_pv0_data = {
+ .debugfs_name = "crtc0_regs",
+ .hvs_available_channels = BIT(0),
+ .hvs_output = 0,
+ .fifo_depth = 64,
+ .pixels_per_clock = 1,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_DSI0,
+ [1] = VC4_ENCODER_TYPE_DPI,
+ },
+};
+
+static const struct vc4_crtc_data bcm2711_pv1_data = {
+ .debugfs_name = "crtc1_regs",
+ .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
+ .hvs_output = 3,
+ .fifo_depth = 64,
+ .pixels_per_clock = 1,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_DSI1,
+ [1] = VC4_ENCODER_TYPE_SMI,
+ },
+};
+
+static const struct vc4_crtc_data bcm2711_pv2_data = {
+ .debugfs_name = "crtc2_regs",
+ .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
+ .hvs_output = 4,
+ .fifo_depth = 256,
+ .pixels_per_clock = 2,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_HDMI0,
+ },
+};
+
+static const struct vc4_crtc_data bcm2711_pv3_data = {
+ .debugfs_name = "crtc3_regs",
+ .hvs_available_channels = BIT(1),
+ .hvs_output = 1,
+ .fifo_depth = 64,
+ .pixels_per_clock = 1,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_VEC,
+ },
+};
+
+static const struct vc4_crtc_data bcm2711_pv4_data = {
+ .debugfs_name = "crtc4_regs",
+ .hvs_available_channels = BIT(0) | BIT(1) | BIT(2),
+ .hvs_output = 5,
+ .fifo_depth = 64,
+ .pixels_per_clock = 2,
+ .encoder_types = {
+ [0] = VC4_ENCODER_TYPE_HDMI1,
+ },
+};
+
static const struct of_device_id vc4_crtc_dt_match[] = {
{ .compatible = "brcm,bcm2835-pixelvalve0", .data = &bcm2835_pv0_data },
{ .compatible = "brcm,bcm2835-pixelvalve1", .data = &bcm2835_pv1_data },
{ .compatible = "brcm,bcm2835-pixelvalve2", .data = &bcm2835_pv2_data },
+ { .compatible = "brcm,bcm2711-pixelvalve0", .data = &bcm2711_pv0_data },
+ { .compatible = "brcm,bcm2711-pixelvalve1", .data = &bcm2711_pv1_data },
+ { .compatible = "brcm,bcm2711-pixelvalve2", .data = &bcm2711_pv2_data },
+ { .compatible = "brcm,bcm2711-pixelvalve3", .data = &bcm2711_pv3_data },
+ { .compatible = "brcm,bcm2711-pixelvalve4", .data = &bcm2711_pv4_data },
{}
};
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index b96ebbb1354b..35279b118d41 100644
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -130,6 +130,8 @@
#define V3D_ERRSTAT 0x00f20
#define PV_CONTROL 0x00
+# define PV5_CONTROL_FIFO_LEVEL_HIGH_MASK VC4_MASK(26, 25)
+# define PV5_CONTROL_FIFO_LEVEL_HIGH_SHIFT 25
# define PV_CONTROL_FORMAT_MASK VC4_MASK(23, 21)
# define PV_CONTROL_FORMAT_SHIFT 21
# define PV_CONTROL_FORMAT_24 0
@@ -209,6 +211,10 @@
#define PV_HACT_ACT 0x30
+#define PV_MUX_CFG 0x34
+# define PV_MUX_CFG_RGB_PIXEL_MUX_MODE_MASK VC4_MASK(5, 2)
+# define PV_MUX_CFG_RGB_PIXEL_MUX_MODE_SHIFT 2
+
#define SCALER_CHANNELS_COUNT 3
#define SCALER_DISPCTRL 0x00000000
--
git-series 0.9.1
next prev parent reply other threads:[~2020-05-27 15:51 UTC|newest]
Thread overview: 151+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-27 15:47 [PATCH v3 000/105] drm/vc4: Support BCM2711 Display Pipeline Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 001/105] reset: Move reset-simple header out of drivers/reset Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 002/105] reset: simple: Add reset callback Maxime Ripard
2020-05-27 16:03 ` Philipp Zabel
2020-05-27 15:47 ` [PATCH v3 003/105] dt-bindings: clock: Add BCM2711 DVP binding Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 004/105] clk: bcm: Add BCM2711 DVP driver Maxime Ripard
2020-06-04 17:26 ` Nicolas Saenz Julienne
2020-06-05 17:43 ` Maxime Ripard
2020-06-05 18:11 ` Nicolas Saenz Julienne
2020-06-05 17:56 ` Eric Anholt
2020-05-27 15:47 ` [PATCH v3 005/105] ARM: dts: bcm2711: Add HDMI DVP Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 006/105] dt-bindings: display: Convert VC4 bindings to schemas Maxime Ripard
2020-05-27 19:12 ` Rob Herring
2020-06-02 15:00 ` Maxime Ripard
2020-06-17 20:21 ` Rob Herring
2020-05-27 15:47 ` [PATCH v3 007/105] dt-bindings: display: vc4: dpi: Add missing clock-names property Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 008/105] dt-bindings: display: vc4: dsi: Add missing clock properties Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 009/105] dt-bindings: display: vc4: hdmi: Add missing clock-names property Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 010/105] dt-bindings: display: vc4: Document BCM2711 VC5 Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 011/105] drm/vc4: drv: Add include guards Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 012/105] drm/vc4: drv: Support BCM2711 Maxime Ripard
2020-05-27 16:27 ` Eric Anholt
2020-05-27 15:47 ` [PATCH v3 013/105] dt-bindings: display: Add support for the BCM2711 HVS Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 014/105] drm/vc4: Add support for the BCM2711 HVS5 Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 015/105] drm/vc4: hvs: Boost the core clock during modeset Maxime Ripard
2020-05-27 16:33 ` Eric Anholt
2020-06-02 12:52 ` Maxime Ripard
2020-06-02 17:52 ` Eric Anholt
2020-05-27 15:47 ` [PATCH v3 016/105] drm/vc4: plane: Improve LBM usage Maxime Ripard
2020-05-27 16:44 ` Eric Anholt
2020-05-27 15:47 ` [PATCH v3 017/105] drm/vc4: plane: Move planes creation to its own function Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 018/105] drm/vc4: plane: Move additional planes creation to driver Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 019/105] drm/vc4: plane: Register all the planes at once Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 020/105] drm/vc4: plane: Create overlays for any CRTC Maxime Ripard
2020-05-27 16:52 ` Eric Anholt
2020-05-27 15:47 ` [PATCH v3 021/105] drm/vc4: plane: Create more planes Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 022/105] drm/vc4: crtc: Rename SoC data structures Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 023/105] drm/vc4: crtc: Switch to of_device_get_match_data Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 024/105] drm/vc4: crtc: Move crtc state to common header Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 025/105] drm/vc4: crtc: Deal with different number of pixel per clock Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 026/105] drm/vc4: crtc: Use a shared interrupt Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 027/105] drm/vc4: crtc: Turn static const variable into a define Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 028/105] drm/vc4: crtc: Restrict HACT_ACT setup to DSI Maxime Ripard
2020-05-27 15:47 ` [PATCH v3 029/105] drm/vc4: crtc: Move the cob allocation outside of bind Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 030/105] drm/vc4: crtc: Rename HVS channel to output Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 031/105] drm/vc4: crtc: Use local chan variable Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 032/105] drm/vc4: crtc: Enable and disable the PV in atomic_enable / disable Maxime Ripard
2020-05-27 16:54 ` Eric Anholt
2020-06-02 14:12 ` Maxime Ripard
2020-06-02 15:02 ` Dave Stevenson
2020-06-02 19:31 ` Eric Anholt
2020-06-02 20:03 ` Stefan Wahren
2020-06-03 13:14 ` Maxime Ripard
2020-06-03 15:26 ` Stefan Wahren
2020-06-12 15:35 ` Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 033/105] drm/vc4: crtc: Assign output to channel automatically Maxime Ripard
2020-05-27 17:23 ` Eric Anholt
2020-06-16 15:04 ` Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 034/105] drm/vc4: crtc: Add FIFO depth to vc4_crtc_data Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 035/105] drm/vc4: crtc: Add function to compute FIFO level bits Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 036/105] drm/vc4: crtc: Rename HDMI encoder type to HDMI0 Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 037/105] drm/vc4: crtc: Add HDMI1 encoder type Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 038/105] drm/vc4: crtc: Remove redundant call to drm_crtc_enable_color_mgmt Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 039/105] drm/vc4: crtc: Disable color management for HVS5 Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 040/105] drm/vc4: crtc: Turn pixelvalve reset into a function Maxime Ripard
2020-05-27 17:30 ` Eric Anholt
2020-05-27 15:48 ` [PATCH v3 041/105] drm/vc4: crtc: Move HVS mode config to HVS file Maxime Ripard
2020-05-27 18:26 ` Eric Anholt
2020-05-27 15:48 ` [PATCH v3 042/105] drm/vc4: crtc: Move PV dump to config_pv Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 043/105] drm/vc4: crtc: Move HVS init and close to a function Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 044/105] drm/vc4: crtc: Move the HVS gamma LUT setup to our init function Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 045/105] drm/vc4: hvs: Make sure our channel is reset Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 046/105] drm/vc4: hvs: Remove mode_set_nofb Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 047/105] drm/vc4: crtc: " Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 048/105] drm/vc4: crtc: Remove redundant pixelvalve reset Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 049/105] drm/vc4: crtc: Move HVS channel init before the PV initialisation Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 050/105] drm/vc4: encoder: Add finer-grained encoder callbacks Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 051/105] drm/vc4: crtc: Add a delay after disabling the PixelValve output Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 052/105] drm/vc4: crtc: Clear the PixelValve FIFO on disable Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 053/105] drm/vc4: crtc: Clear the PixelValve FIFO during configuration Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 054/105] drm/vc4: hvs: Make the stop_channel function public Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 055/105] drm/vc4: hvs: Introduce a function to get the assigned FIFO Maxime Ripard
2020-05-27 19:40 ` Eric Anholt
2020-06-03 9:43 ` Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 056/105] drm/vc4: crtc: Move the CRTC disable out Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 057/105] drm/vc4: drv: Disable the CRTC at boot time Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 058/105] dt-bindings: display: vc4: pv: Add BCM2711 pixel valves Maxime Ripard
2020-05-27 15:48 ` Maxime Ripard [this message]
2020-05-27 19:24 ` [PATCH v3 059/105] drm/vc4: crtc: Add BCM2711 pixelvalves Eric Anholt
2020-05-27 15:48 ` [PATCH v3 060/105] drm/vc4: crtc: Make state functions public Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 061/105] drm/vc4: crtc: Split CRTC data in two Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 062/105] drm/vc4: crtc: Only access the PixelValve registers if we have to Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 063/105] drm/vc4: crtc: Move the CRTC initialisation to a separate function Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 064/105] drm/vc4: crtc: Change the HVS5 test for of_device_is_compatible Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 065/105] drm/vc4: crtc: Move the txp_armed function to the TXP Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 066/105] drm/vc4: txp: Turn the TXP into a CRTC of its own Maxime Ripard
2020-05-28 15:51 ` Emil Velikov
2020-06-10 18:40 ` Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 067/105] drm/vc4: crtc: Remove the feed_txp tests Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 068/105] drm/vc4: hdmi: Use debugfs private field Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 069/105] drm/vc4: hdmi: Move structure to header Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 070/105] drm/vc4: hdmi: rework connectors and encoders Maxime Ripard
2020-05-27 18:41 ` Eric Anholt
2020-06-02 15:54 ` Maxime Ripard
2020-06-03 17:32 ` Stefan Wahren
2020-06-05 14:35 ` Maxime Ripard
2020-06-06 8:06 ` Stefan Wahren
2020-06-11 13:34 ` Maxime Ripard
2020-06-14 16:16 ` Stefan Wahren
2020-06-16 12:30 ` Maxime Ripard
2020-06-16 19:09 ` Stefan Wahren
2020-05-27 15:48 ` [PATCH v3 071/105] drm/vc4: hdmi: Remove DDC argument to connector_init Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 072/105] drm/vc4: hdmi: Rename hdmi to vc4_hdmi Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 073/105] drm/vc4: hdmi: Move accessors " Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 074/105] drm/vc4: hdmi: Use local vc4_hdmi directly Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 075/105] drm/vc4: hdmi: Add container_of macros for encoders and connectors Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 076/105] drm/vc4: hdmi: Pass vc4_hdmi to CEC code Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 077/105] drm/vc4: hdmi: Remove vc4_dev hdmi pointer Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 078/105] drm/vc4: hdmi: Remove vc4_hdmi_connector Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 079/105] drm/vc4: hdmi: Introduce resource init and variant Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 080/105] drm/vc4: hdmi: Implement a register layout abstraction Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 081/105] drm/vc4: hdmi: Add reset callback Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 082/105] drm/vc4: hdmi: Add PHY init and disable function Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 083/105] drm/vc4: hdmi: Add PHY RNG enable / " Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 084/105] drm/vc4: hdmi: Add a CSC setup callback Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 085/105] drm/vc4: hdmi: Store the encoder type in the variant structure Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 086/105] drm/vc4: hdmi: Deal with multiple debugfs files Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 087/105] drm/vc4: hdmi: Move CEC init to its own function Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 088/105] drm/vc4: hdmi: Add CEC support flag Maxime Ripard
2020-05-27 15:48 ` [PATCH v3 089/105] drm/vc4: hdmi: Remove unused CEC_CLOCK_DIV define Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 090/105] drm/vc4: hdmi: Rename drm_encoder pointer in mode_valid Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 091/105] drm/vc4: hdmi: Adjust HSM clock rate depending on pixel rate Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 092/105] drm/vc4: hdmi: Use clk_set_min_rate instead Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 093/105] drm/vc4: hdmi: Use reg-names to retrieve the HDMI audio registers Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 094/105] drm/vc4: hdmi: Reset audio infoframe on encoder_enable if previously streaming Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 095/105] drm/vc4: hdmi: Set the b-frame marker to the match ALSA's default Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 096/105] drm/vc4: hdmi: Add audio-related callbacks Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 097/105] drm/vc4: hdmi: Deal with multiple ALSA cards Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 098/105] drm/vc4: hdmi: Remove register dumps in enable Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 099/105] drm/vc4: hdmi: Always recenter the HDMI FIFO Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 100/105] drm/vc4: hdmi: Implement finer-grained hooks Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 101/105] drm/vc4: hdmi: Do the VID_CTL configuration at once Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 102/105] drm/vc4: hdmi: Switch to blank pixels when disabled Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 103/105] drm/vc4: hdmi: Support the BCM2711 HDMI controllers Maxime Ripard
2020-05-27 15:49 ` [PATCH v3 104/105] dt-bindings: display: vc4: hdmi: Add BCM2711 HDMI controllers bindings Maxime Ripard
2020-05-29 18:18 ` Rob Herring
2020-06-02 15:08 ` Maxime Ripard
2020-06-08 23:01 ` Rob Herring
2020-05-27 15:49 ` [PATCH v3 105/105] ARM: dts: bcm2711: Enable the display pipeline Maxime Ripard
2020-06-03 20:11 ` Stefan Wahren
2020-06-02 20:12 ` [PATCH v3 000/105] drm/vc4: Support BCM2711 Display Pipeline Stefan Wahren
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=eb489952ba212a84dbe3d369371c0ee75b9a2d3e.1590594512.git-series.maxime@cerno.tech \
--to=maxime@cerno.tech \
--cc=bcm-kernel-feedback-list@broadcom.com \
--cc=dave.stevenson@raspberrypi.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=eric@anholt.net \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rpi-kernel@lists.infradead.org \
--cc=nsaenzjulienne@suse.de \
--cc=phil@raspberrypi.com \
--cc=tim.gover@raspberrypi.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).