From: Mathieu Desnoyers via lttng-dev <lttng-dev@lists.lttng.org>
To: "Ondřej Surý" <ondrej@sury.org>,
lttng-dev@lists.lttng.org, paulmck <paulmck@kernel.org>
Subject: Re: [lttng-dev] [PATCH 3/7] Use __atomic_thread_fence() for cmm_barrier()
Date: Mon, 20 Mar 2023 14:06:16 -0400 [thread overview]
Message-ID: <046ee03d-6257-7424-e8ef-a0e92ab54018@efficios.com> (raw)
In-Reply-To: <20230317213755.455957-4-ondrej@sury.org>
On 2023-03-17 17:37, Ondřej Surý via lttng-dev wrote:
> Use __atomic_thread_fence(__ATOMIC_ACQ_REL) for cmm_barrier(), so
> ThreadSanitizer can understand the memory synchronization.
You should update the patch subject and commit message to replace
"thread" by "signal".
>
> FIXME: What should be the correct memory ordering here?
ACQ_REL is what we want here, I think this is fine. We want to prevent
the compiler from reordering loads/stores across the fence, but don't
want any barrier instructions issued.
Thanks,
Mathieu
>
> Signed-off-by: Ondřej Surý <ondrej@sury.org>
> ---
> include/urcu/compiler.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/urcu/compiler.h b/include/urcu/compiler.h
> index 2f32b38..ede909f 100644
> --- a/include/urcu/compiler.h
> +++ b/include/urcu/compiler.h
> @@ -28,7 +28,8 @@
> #define caa_likely(x) __builtin_expect(!!(x), 1)
> #define caa_unlikely(x) __builtin_expect(!!(x), 0)
>
> -#define cmm_barrier() __asm__ __volatile__ ("" : : : "memory")
> +/* FIXME: What would be a correct memory ordering here? */
> +#define cmm_barrier() __atomic_signal_fence(__ATOMIC_ACQ_REL)
>
> /*
> * Instruct the compiler to perform only a single access to a variable
--
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com
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next prev parent reply other threads:[~2023-03-20 18:06 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-17 21:37 [lttng-dev] [PATCH 0/7] Replace the custom code with gcc/clang __atomic builtins Ondřej Surý via lttng-dev
2023-03-17 21:37 ` [lttng-dev] [PATCH 1/7] Require __atomic builtins to build Ondřej Surý via lttng-dev
2023-03-17 21:37 ` [lttng-dev] [PATCH 2/7] Use gcc __atomic builtis for <urcu/uatomic.h> implementation Ondřej Surý via lttng-dev
2023-03-20 18:03 ` Mathieu Desnoyers via lttng-dev
2023-03-20 18:13 ` Mathieu Desnoyers via lttng-dev
2023-03-20 18:28 ` Ondřej Surý via lttng-dev
2023-03-20 18:38 ` Mathieu Desnoyers via lttng-dev
2023-03-20 18:41 ` Mathieu Desnoyers via lttng-dev
2023-03-20 19:38 ` Duncan Sands via lttng-dev
2023-03-21 20:26 ` Mathieu Desnoyers via lttng-dev
2023-03-22 8:24 ` Duncan Sands via lttng-dev
2023-03-17 21:37 ` [lttng-dev] [PATCH 3/7] Use __atomic_thread_fence() for cmm_barrier() Ondřej Surý via lttng-dev
2023-03-20 18:06 ` Mathieu Desnoyers via lttng-dev [this message]
2023-03-20 18:14 ` Mathieu Desnoyers via lttng-dev
2023-03-17 21:37 ` [lttng-dev] [PATCH 4/7] Replace the internal pointer manipulation with __atomic builtins Ondřej Surý via lttng-dev
2023-03-20 18:25 ` Mathieu Desnoyers via lttng-dev
2023-03-17 21:37 ` [lttng-dev] [PATCH 5/7] Use __atomic builtins to implement CMM_{LOAD, STORE}_SHARED Ondřej Surý via lttng-dev
2023-03-20 18:28 ` Mathieu Desnoyers via lttng-dev
2023-03-17 21:37 ` [lttng-dev] [PATCH 6/7] Fix: uatomic_or() need retyping to uintptr_t in rculfhash.c Ondřej Surý via lttng-dev
2023-03-20 18:31 ` Mathieu Desnoyers via lttng-dev
2023-03-21 10:15 ` Ondřej Surý via lttng-dev
2023-03-21 14:44 ` Mathieu Desnoyers via lttng-dev
2023-03-21 14:45 ` Mathieu Desnoyers via lttng-dev
2023-03-17 21:37 ` [lttng-dev] [PATCH 7/7] Experiment: Add explicit memory barrier in free_completion() Ondřej Surý via lttng-dev
2023-03-20 18:37 ` Mathieu Desnoyers via lttng-dev
2023-03-21 10:21 ` Ondřej Surý via lttng-dev
2023-03-21 14:46 ` Mathieu Desnoyers via lttng-dev
2023-03-21 14:48 ` Ondřej Surý via lttng-dev
2023-03-21 14:49 ` Mathieu Desnoyers via lttng-dev
2023-03-21 14:59 ` [lttng-dev] TSAN and the tests Ondřej Surý via lttng-dev
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