RE: [RFC net-next] net: stmmac: should not modify RX descriptor when STMMAC resume

From: Joakim Zhang <qiangqing.zhang@nxp.com>
To: Florian Fainelli <f.fainelli@gmail.com>,
	Jon Hunter <jonathanh@nvidia.com>,
	"peppe.cavallaro@st.com" <peppe.cavallaro@st.com>,
	"alexandre.torgue@foss.st.com" <alexandre.torgue@foss.st.com>,
	"joabreu@synopsys.com" <joabreu@synopsys.com>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
	"andrew@lunn.ch" <andrew@lunn.ch>
Cc: dl-linux-imx <linux-imx@nxp.com>,
	"treding@nvidia.com" <treding@nvidia.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: RE: [RFC net-next] net: stmmac: should not modify RX descriptor when STMMAC resume
Date: Fri, 23 Apr 2021 02:37:35 +0000	[thread overview]
Message-ID: <DB8PR04MB6795520586BE91835A6CAA43E6459@DB8PR04MB6795.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <22bf351b-3f01-db62-8185-7a925f19998e@gmail.com>

Hi Florian, John,

> -----Original Message-----
> From: Florian Fainelli <f.fainelli@gmail.com>
> Sent: 2021年4月23日 1:33
> To: Jon Hunter <jonathanh@nvidia.com>; Joakim Zhang
> <qiangqing.zhang@nxp.com>; peppe.cavallaro@st.com;
> alexandre.torgue@foss.st.com; joabreu@synopsys.com;
> davem@davemloft.net; kuba@kernel.org; mcoquelin.stm32@gmail.com;
> andrew@lunn.ch
> Cc: dl-linux-imx <linux-imx@nxp.com>; treding@nvidia.com;
> netdev@vger.kernel.org
> Subject: Re: [RFC net-next] net: stmmac: should not modify RX descriptor when
> STMMAC resume
> 
> 
> 
> On 4/22/2021 10:00 AM, Jon Hunter wrote:
> >
> > On 22/04/2021 17:12, Florian Fainelli wrote:
> >
> > ...
> >
> >> What does the resumption failure looks like? Does the stmmac driver
> >> successfully resume from your suspend state, but there is no network
> >> traffic? Do you have a log by any chance?
> >
> > The board fails to resume and appears to hang. With regard to the
> > original patch I did find that moving the code to re-init the RX
> > buffers to before the PHY is enabled did work [0].
> 
> You indicated that you are using a Broadcom PHY, which specific PHY are you
> using?
> 
> I suspect that the stmmac is somehow relying on the PHY to provide its
> 125MHz RXC clock back to you in order to have its RX logic work correctly.
Yes, for i.MX platforms, we need PHY feeds its RXC clock back to STMMAC for RX logic, not sure if it is need for NVIDIA platforms.
And now stmmac resume PHY(phylink_start) before initialize MAC.

> One difference between using the Broadcom PHY and the Generic PHY drivers
> could be whether your Broadcom PHY driver entry has a .suspend/.resume
> callback implemented or not.

If there is no .suspend/.resume callback, the PHY should always work. I have a concern, does Boardcom always can feed continuous RX clock? Does it support EEE?

Best Regards,
Joakim Zhang
> >
> >> Is power to the Ethernet MAC turned off in this suspend state, in
> >> which case could we be missing an essential register programming stage?
> >
> > It seems to be more of a sequencing issue rather than a power issue.
> >
> > I have also ran 2000 suspend cycles on our Tegra platform without
> > Joakim's patch to see how stable suspend is on this platform. I did
> > not see any failures in 2000 cycles and so it is not evident to me
> > that the problem that Joakim is trying to fix is seen on devices such as Tegra.
> > Admittedly, if it is hard to reproduce, then it is possible we have
> > not seen it yet.
> >
> > Jon
> >
> > [0]
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore
> > .kernel.org%2Fnetdev%2Fe4864046-e52f-63b6-a490-74c3cd8045f4%40nvidia
> .c
> >
> om%2F&amp;data=04%7C01%7Cqiangqing.zhang%40nxp.com%7Ca4ce9a89b
> 92c4f600
> >
> 84608d905b4a285%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63
> 7547095
> >
> 639789970%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi
> V2luMzIi
> >
> LCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=xLgYkYit0EfOXbbM
> lz78ws
> > b4w19W36A0FvPvkaPzl7o%3D&amp;reserved=0
> >
> 
> --
> Florian