* [djiang:pci-mbox 7/9] drivers/pci/mmb.c:56:11: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations
@ 2024-05-10 13:01 kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2024-05-10 13:01 UTC (permalink / raw)
To: Dave Jiang; +Cc: llvm, oe-kbuild-all
tree: https://git.kernel.org/pub/scm/linux/kernel/git/djiang/linux.git pci-mbox
head: 9c38a15525283584d0d49404c11c397fe71ba1e8
commit: d7ef18124cb4ba45e597c4b1fdd44ab208ce797e [7/9] PCI/cxl: Migrate the common mailbox operation code from CXL to PCI
config: i386-buildonly-randconfig-004-20240510 (https://download.01.org/0day-ci/archive/20240510/202405102047.li8ZD9Vo-lkp@intel.com/config)
compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240510/202405102047.li8ZD9Vo-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202405102047.li8ZD9Vo-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/pci/mmb.c:56:11: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
56 | status = readq(mbox->mbox_ready_addr + PCI_MMB_STATUS_OFFSET);
| ^
>> drivers/pci/mmb.c:180:2: error: call to undeclared function 'writeq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
180 | writeq(cmd_reg, mbox->mbox_ctrl_addr + PCI_MMB_CMD_OFFSET);
| ^
drivers/pci/mmb.c:194:15: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
194 | status_reg = readq(mbox->mbox_ctrl_addr + PCI_MMB_STATUS_OFFSET);
| ^
3 errors generated.
--
>> drivers/cxl/core/mbox.c:1463:14: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
1463 | md_status = readq(mbox->mbox_ready_addr + CXLMDEV_STATUS_OFFSET);
| ^
drivers/cxl/core/mbox.c:1491:8: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
1491 | reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET);
| ^
drivers/cxl/core/mbox.c:1557:18: error: call to undeclared function 'readq'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
1557 | bg_status_reg = readq(cxlds->regs.mbox +
| ^
3 errors generated.
vim +/readq +56 drivers/pci/mmb.c
51
52 static bool pci_mmb_ready(struct mmio_mailbox *mbox)
53 {
54 u64 status;
55
> 56 status = readq(mbox->mbox_ready_addr + PCI_MMB_STATUS_OFFSET);
57
58 return !!(status & PCI_MMB_STATUS_READY);
59 }
60
61 static int pci_mmb_wait_for_doorbell(struct mmio_mailbox *mbox)
62 {
63 const unsigned long start = jiffies;
64 struct device *dev = mbox->dev;
65 unsigned long end = start;
66
67 while (mmb_doorbell_busy(mbox)) {
68 end = jiffies;
69
70 if (time_after(end, start + PCI_MMB_TIMEOUT_MS)) {
71 /* Check again in case preempted before timeout test */
72 if (!mmb_doorbell_busy(mbox))
73 break;
74 return -ETIMEDOUT;
75 }
76 cpu_relax();
77 }
78
79 dev_dbg(dev, "Doorbell wait took %dms",
80 jiffies_to_msecs(end) - jiffies_to_msecs(start));
81 return 0;
82 }
83
84 static int mmb_send_prep(struct mmio_mailbox *mbox, struct mmio_mbox_cmd *cmd)
85 {
86 if (!mbox->ops || !mbox->ops->cmd_prep)
87 return -EOPNOTSUPP;
88
89 return mbox->ops->cmd_prep(mbox, cmd);
90 }
91
92 static int mmb_send_done(struct mmio_mailbox *mbox, struct mmio_mbox_cmd *cmd)
93 {
94 if (!mbox->ops || !mbox->ops->cmd_done)
95 return -EOPNOTSUPP;
96
97 return mbox->ops->cmd_done(mbox, cmd);
98 }
99
100 static int mmb_ready(struct mmio_mailbox *mbox)
101 {
102 if (!mbox->ops || !mbox->ops->mbox_ready)
103 return -EOPNOTSUPP;
104
105 return mbox->ops->mbox_ready(mbox);
106 }
107
108 /**
109 * __cxl_pci_mbox_send_cmd() - Execute a mailbox command
110 * @mds: The memory device driver data
111 * @mbox_cmd: Command to send to the memory device.
112 *
113 * Context: Any context. Expects mbox_mutex to be held.
114 * Return: -ETIMEDOUT if timeout occurred waiting for completion. 0 on success.
115 * Caller should check the return code in @mbox_cmd to make sure it
116 * succeeded.
117 *
118 * This is a generic form of the CXL mailbox send command thus only using the
119 * registers defined by the mailbox capability ID - CXL 2.0 8.2.8.4. Memory
120 * devices, and perhaps other types of CXL devices may have further information
121 * available upon error conditions. Driver facilities wishing to send mailbox
122 * commands should use the wrapper command.
123 *
124 * The CXL spec allows for up to two mailboxes. The intention is for the primary
125 * mailbox to be OS controlled and the secondary mailbox to be used by system
126 * firmware. This allows the OS and firmware to communicate with the device and
127 * not need to coordinate with each other. The driver only uses the primary
128 * mailbox.
129 */
130 static int __mmio_mailbox_send_cmd(struct mmio_mailbox *mbox,
131 struct mmio_mbox_cmd *mbox_cmd)
132 {
133 void __iomem *payload = mbox->mbox_ctrl_addr + PCI_MMB_PAYLOAD_OFFSET;
134 struct device *dev = mbox->dev;
135 u64 cmd_reg, status_reg;
136 size_t out_len;
137 int rc;
138
139 lockdep_assert_held(&mbox->mbox_mutex);
140
141 /*
142 * Here are the steps from '6.35.1.3.1 MMB Operation' of PCIe Base Spec r6.2
143 * 1. Caller reads MB Control Register to verify doorbell is clear
144 * 2. Caller writes Command Register
145 * 3. Caller writes Command Payload Registers if input payload is non-empty
146 * 4. Caller writes MB Control Register to set doorbell
147 * 5. Caller either polls for doorbell to be clear or waits for interrupt if configured
148 * 6. Caller reads MB Status Register to fetch Return code
149 * 7. If command successful, Caller reads Command Register to get Payload Length
150 * 8. If output payload is non-empty, host reads Command Payload Registers
151 *
152 * Hardware is free to do whatever it wants before the doorbell is rung,
153 * and isn't allowed to change anything after it clears the doorbell. As
154 * such, steps 2 and 3 can happen in any order, and steps 6, 7, 8 can
155 * also happen in any order (though some orders might not make sense).
156 */
157
158 /* #1 */
159 if (mmb_doorbell_busy(mbox)) {
160 dev_warn(dev, "mailbox queue busy");
161 return -EBUSY;
162 }
163
164 rc = mmb_send_prep(mbox, mbox_cmd);
165 if (rc < 0)
166 return rc;
167
168 cmd_reg = FIELD_PREP(PCI_MMB_CMD_COMMAND_OPCODE_MASK,
169 mbox_cmd->opcode);
170 if (mbox_cmd->size_in) {
171 if (WARN_ON(!mbox_cmd->payload_in))
172 return -EINVAL;
173
174 cmd_reg |= FIELD_PREP(PCI_MMB_CMD_PAYLOAD_LENGTH_MASK,
175 mbox_cmd->size_in);
176 memcpy_toio(payload, mbox_cmd->payload_in, mbox_cmd->size_in);
177 }
178
179 /* #2, #3 */
> 180 writeq(cmd_reg, mbox->mbox_ctrl_addr + PCI_MMB_CMD_OFFSET);
181
182 /* #4 */
183 dev_dbg(dev, "Sending command: 0x%04x\n", mbox_cmd->opcode);
184 writel(PCI_MMB_CTRL_DOORBELL, mbox->mbox_ctrl_addr + PCI_MMB_CTRL_OFFSET);
185
186 /* #5 */
187 rc = pci_mmb_wait_for_doorbell(mbox);
188 if (rc == -ETIMEDOUT) {
189 dev_warn(dev, "mailbox timeout");
190 return rc;
191 }
192
193 /* #6 */
194 status_reg = readq(mbox->mbox_ctrl_addr + PCI_MMB_STATUS_OFFSET);
195 mbox_cmd->return_code = FIELD_GET(PCI_MMB_STATUS_RET_CODE_MASK,
196 status_reg);
197
198 rc = mmb_send_done(mbox, mbox_cmd);
199 if (rc < 0)
200 return rc;
201 if (rc == 1)
202 goto success;
203
204 if (mbox_cmd->return_code != 0)
205 return 0; /* completed but caller must check return_code */
206
207 success:
208 /* #7 */
209 cmd_reg = readq(mbox->mbox_ctrl_addr + PCI_MMB_CMD_OFFSET);
210 out_len = FIELD_GET(PCI_MMB_CMD_PAYLOAD_LENGTH_MASK, cmd_reg);
211
212 /* #8 */
213 if (out_len && mbox_cmd->payload_out) {
214 /*
215 * Sanitize the copy. If hardware misbehaves, out_len per the
216 * spec can actually be greater than the max allowed size (21
217 * bits available but spec defined 1M max). The caller also may
218 * have requested less data than the hardware supplied even
219 * within spec.
220 */
221 size_t n;
222
223 n = min3(mbox_cmd->size_out, mbox->payload_size, out_len);
224 memcpy_fromio(mbox_cmd->payload_out, payload, n);
225 mbox_cmd->size_out = n;
226 } else {
227 mbox_cmd->size_out = 0;
228 }
229
230 return 0;
231 }
232
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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