From: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
To: Joel Stanley <joel@jms.id.au>
Cc: "Laurent Vivier" <lvivier@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Thomas Huth" <thuth@redhat.com>,
"Andrew Jeffery" <andrew@aj.id.au>,
"QEMU Developers" <qemu-devel@nongnu.org>,
qemu-arm <qemu-arm@nongnu.org>, "Cédric Le Goater" <clg@kaod.org>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [PATCH 3/3] tests: Aspeed HACE Scatter-Gather tests
Date: Fri, 26 Mar 2021 14:00:02 -0300 [thread overview]
Message-ID: <099f53c6-abbe-b70b-94fc-cc71e1094051@linux.vnet.ibm.com> (raw)
In-Reply-To: <CACPK8XfHw06+o6LJsPY4X3=V69L2uT+2cZurCNxd623WT0Em+A@mail.gmail.com>
Hi Joel,
On 3/24/2021 11:18 PM, Joel Stanley wrote:
>> + const uint32_t src_addr_1 = src_addr + 0x1000000;
>> + const uint32_t src_addr_2 = src_addr + 0x2000000;
>> + const uint32_t src_addr_3 = src_addr + 0x3000000;
>> + const uint32_t digest_addr = src_addr + 0x4000000;
>> + uint8_t digest[32] = {0};
>> + struct aspeed_sg_list array[] = {
>> + { sizeof(test_vector_sg1), src_addr_1},
>> + { sizeof(test_vector_sg2), src_addr_2},
>> + { sizeof(test_vector_sg3) | 1u << 31, src_addr_3},
>
> These sizeofs are always going to be 3.
I was trying to not hard-code 3 here and perhaps allow for more clarity and
extensibility, in case we ever decide to use larger vectors?
> I assume 1 << 31 is to indicate the final entry? Perhaps add a define for it.
ack
>
>> + };
>> +
>> + /* Check engine is idle, no busy or irq bits set */
>> + g_assert_cmphex(qtest_readl(s, base + HACE_STS), ==, 0);
>> +
>> + /* Write test vector into memory */
>> + qtest_memwrite(s, src_addr_1, test_vector_sg1, sizeof(test_vector_sg1));
>> + qtest_memwrite(s, src_addr_2, test_vector_sg2, sizeof(test_vector_sg2));
>> + qtest_memwrite(s, src_addr_3, test_vector_sg3, sizeof(test_vector_sg3));
>
> It would simplify your test case if you wrote the test vector to the
> one memory location.
I guess I like that each vector is significantly displaced from each other, as this
is supported by the hardware.
>
>> struct masks {
>> - uint32_t src;
>> + uint32_t src_direct;
>
> You could leave this one the same.
>
>> + uint32_t src_sg;
>
> You add this, but haven't written a new test to use it.
Turns out there's nothing special about src/dst/len masking
when using HASH_SG_EN, so I'll remove those.
Thanks,
-Klaus
--
Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
prev parent reply other threads:[~2021-03-26 17:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-24 22:38 [PATCH 0/3] aspeed: HACE hash Scatter-Gather support Klaus Heinrich Kiwi
2021-03-24 22:38 ` [PATCH 1/3] aspeed: Coding Style cleanups on do_hash_operation Klaus Heinrich Kiwi
2021-03-24 22:57 ` Cédric Le Goater
2021-03-25 0:15 ` Klaus Heinrich Kiwi
2021-03-24 22:38 ` [PATCH 2/3] aspeed: Add Scater-Gather support for HACE Hash Klaus Heinrich Kiwi
2021-03-25 3:40 ` Joel Stanley
2021-03-26 16:47 ` Klaus Heinrich Kiwi
2021-03-25 7:55 ` Cédric Le Goater
2021-03-26 16:51 ` Klaus Heinrich Kiwi
2021-03-24 22:38 ` [PATCH 3/3] tests: Aspeed HACE Scatter-Gather tests Klaus Heinrich Kiwi
2021-03-25 2:18 ` Joel Stanley
2021-03-26 17:00 ` Klaus Heinrich Kiwi [this message]
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