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From: Tao Xu <tao3.xu@intel.com>
To: mst@redhat.com, imammedo@redhat.com, eblake@redhat.com,
	ehabkost@redhat.com, marcel.apfelbaum@gmail.com,
	armbru@redhat.com, mdroth@linux.vnet.ibm.com, thuth@redhat.com,
	lvivier@redhat.com
Cc: jingqi.liu@intel.com, tao3.xu@intel.com, fan.du@intel.com,
	qemu-devel@nongnu.org, jonathan.cameron@huawei.com
Subject: [PATCH v15 07/12] numa: Calculate hmat latency and bandwidth entry list
Date: Thu,  7 Nov 2019 15:45:06 +0800	[thread overview]
Message-ID: <20191107074511.14304-8-tao3.xu@intel.com> (raw)
In-Reply-To: <20191107074511.14304-1-tao3.xu@intel.com>

Compress HMAT latency and bandwidth raw data into uint16_t data,
which can be stored in HMAT table.

Suggested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Tao Xu <tao3.xu@intel.com>
---

No changes in v15.

Changes in v14:
    - Convert latency from ns to ps, because ACPI 6.3 HMAT table use
      ps as minimum unit
---
 hw/core/numa.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 58 insertions(+), 1 deletion(-)

diff --git a/hw/core/numa.c b/hw/core/numa.c
index f391760c20..523dd80822 100644
--- a/hw/core/numa.c
+++ b/hw/core/numa.c
@@ -483,6 +483,47 @@ static void complete_init_numa_distance(MachineState *ms)
     }
 }
 
+static void calculate_hmat_entry_list(HMAT_LB_Info *hmat_lb, int num_nodes)
+{
+    int i, index;
+    uint16_t *entry_list;
+    uint64_t base;
+    GArray *lb_data_list;
+    HMAT_LB_Data *lb_data;
+
+    if (hmat_lb->data_type <= HMAT_LB_DATA_WRITE_LATENCY) {
+        base = hmat_lb->base_latency;
+        lb_data_list = hmat_lb->latency;
+    } else {
+        base = hmat_lb->base_bandwidth;
+        lb_data_list = hmat_lb->bandwidth;
+    }
+
+    entry_list = g_malloc0(lb_data_list->len * sizeof(uint16_t));
+    for (i = 0; i < lb_data_list->len; i++) {
+        lb_data = &g_array_index(lb_data_list, HMAT_LB_Data, i);
+        index = lb_data->initiator * num_nodes + lb_data->target;
+        if (entry_list[index]) {
+            error_report("Duplicate configuration of the latency for "
+                "initiator=%d and target=%d.", lb_data->initiator,
+                lb_data->target);
+            exit(1);
+        }
+
+        entry_list[index] = (uint16_t)(lb_data->rawdata / base);
+    }
+
+    if (hmat_lb->data_type <= HMAT_LB_DATA_WRITE_LATENCY) {
+        /* Convert latency base from nanoseconds to picosecond */
+        hmat_lb->base_latency = base * 1000;
+        hmat_lb->entry_latency = entry_list;
+    } else {
+        /* Convert bandwidth base from Byte to Megabyte */
+        hmat_lb->base_bandwidth = base / MiB;
+        hmat_lb->entry_bandwidth = entry_list;
+    }
+}
+
 void numa_legacy_auto_assign_ram(MachineClass *mc, NodeInfo *nodes,
                                  int nb_nodes, ram_addr_t size)
 {
@@ -521,9 +562,10 @@ void numa_default_auto_assign_ram(MachineClass *mc, NodeInfo *nodes,
 
 void numa_complete_configuration(MachineState *ms)
 {
-    int i;
+    int i, hierarchy, type;
     MachineClass *mc = MACHINE_GET_CLASS(ms);
     NodeInfo *numa_info = ms->numa_state->nodes;
+    HMAT_LB_Info *numa_hmat_lb;
 
     /*
      * If memory hotplug is enabled (slots > 0) but without '-numa'
@@ -620,6 +662,21 @@ void numa_complete_configuration(MachineState *ms)
             /* Validation succeeded, now fill in any missing distances. */
             complete_init_numa_distance(ms);
         }
+
+        if (ms->numa_state->hmat_enabled) {
+            for (hierarchy = HMAT_LB_MEM_MEMORY;
+                 hierarchy <= HMAT_LB_MEM_CACHE_3RD_LEVEL; hierarchy++) {
+                for (type = HMAT_LB_DATA_ACCESS_LATENCY;
+                    type <= HMAT_LB_DATA_WRITE_BANDWIDTH; type++) {
+                    numa_hmat_lb = ms->numa_state->hmat_lb[hierarchy][type];
+
+                    if (numa_hmat_lb) {
+                        calculate_hmat_entry_list(numa_hmat_lb,
+                                                  ms->numa_state->num_nodes);
+                    }
+                }
+            }
+        }
     }
 }
 
-- 
2.20.1



  parent reply	other threads:[~2019-11-07  7:52 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-07  7:44 [PATCH v15 00/12] Build ACPI Heterogeneous Memory Attribute Table (HMAT) Tao Xu
2019-11-07  7:45 ` [PATCH v15 01/12] util/cutils: refactor do_strtosz() to support suffixes list Tao Xu
2019-11-07 17:52   ` Eduardo Habkost
2019-11-07  7:45 ` [PATCH v15 02/12] util/cutils: Add qemu_strtotime_ns() Tao Xu
2019-11-07 17:55   ` Eduardo Habkost
2019-11-07  7:45 ` [PATCH v15 03/12] qapi: Add builtin type time Tao Xu
2019-11-07  7:45 ` [PATCH v15 04/12] tests: Add test for QAPI " Tao Xu
2019-11-07  7:45 ` [PATCH v15 05/12] numa: Extend CLI to provide initiator information for numa nodes Tao Xu
2019-11-07  7:45 ` [PATCH v15 06/12] numa: Extend CLI to provide memory latency and bandwidth information Tao Xu
2019-11-08 11:42   ` Igor Mammedov
2019-11-07  7:45 ` Tao Xu [this message]
2019-11-08 12:12   ` [PATCH v15 07/12] numa: Calculate hmat latency and bandwidth entry list Igor Mammedov
2019-11-07  7:45 ` [PATCH v15 08/12] numa: Extend CLI to provide memory side cache information Tao Xu
2019-11-08 13:34   ` Igor Mammedov
2019-11-07  7:45 ` [PATCH v15 09/12] hmat acpi: Build Memory Proximity Domain Attributes Structure(s) Tao Xu
2019-11-08 13:44   ` Igor Mammedov
2019-11-11  1:21     ` Tao Xu
2019-11-07  7:45 ` [PATCH v15 10/12] hmat acpi: Build System Locality Latency and Bandwidth Information Structure(s) Tao Xu
2019-11-08 14:11   ` Igor Mammedov
2019-11-07  7:45 ` [PATCH v15 11/12] hmat acpi: Build Memory Side Cache " Tao Xu
2019-11-08 14:39   ` Igor Mammedov
2019-11-07  7:45 ` [PATCH v15 12/12] tests/bios-tables-test: add test cases for ACPI HMAT Tao Xu
2019-11-08 14:51   ` Igor Mammedov
2019-11-07  9:03 ` [PATCH v15 00/12] Build ACPI Heterogeneous Memory Attribute Table (HMAT) Michael S. Tsirkin
2019-11-08  0:57   ` Tao Xu

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