* [PATCH v2] target/ppc: Fix typo in comments
@ 2020-02-13 23:57 BALATON Zoltan
2020-02-15 4:13 ` David Gibson
0 siblings, 1 reply; 2+ messages in thread
From: BALATON Zoltan @ 2020-02-13 23:57 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-trivial, David Gibson
"Deferred" was misspelled as "differed" in some comments, correct this
typo,
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
v2: Found one more where even the typo was misspelled
target/ppc/fpu_helper.c | 4 ++--
target/ppc/translate/fp-impl.inc.c | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index dc383242f7..ae43b08eb5 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -293,7 +293,7 @@ static void float_invalid_op_vxvc(CPUPPCState *env, bool set_fpcc,
env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_VXVC;
/* Update the floating-point enabled exception summary */
env->fpscr |= FP_FEX;
- /* Exception is differed */
+ /* Exception is deferred */
}
}
@@ -644,7 +644,7 @@ static void do_float_check_status(CPUPPCState *env, uintptr_t raddr)
if (cs->exception_index == POWERPC_EXCP_PROGRAM &&
(env->error_code & POWERPC_EXCP_FP)) {
- /* Differred floating-point exception after target FPR update */
+ /* Deferred floating-point exception after target FPR update */
if (fp_exceptions_enabled(env)) {
raise_exception_err_ra(env, cs->exception_index,
env->error_code, raddr);
diff --git a/target/ppc/translate/fp-impl.inc.c b/target/ppc/translate/fp-impl.inc.c
index d8e27bf4d5..9f7868ee28 100644
--- a/target/ppc/translate/fp-impl.inc.c
+++ b/target/ppc/translate/fp-impl.inc.c
@@ -781,7 +781,7 @@ static void gen_mtfsb1(DisasContext *ctx)
tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
}
- /* We can raise a differed exception */
+ /* We can raise a deferred exception */
gen_helper_float_check_status(cpu_env);
}
@@ -817,7 +817,7 @@ static void gen_mtfsf(DisasContext *ctx)
tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
}
- /* We can raise a differed exception */
+ /* We can raise a deferred exception */
gen_helper_float_check_status(cpu_env);
tcg_temp_free_i64(t1);
}
@@ -850,7 +850,7 @@ static void gen_mtfsfi(DisasContext *ctx)
tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
}
- /* We can raise a differed exception */
+ /* We can raise a deferred exception */
gen_helper_float_check_status(cpu_env);
}
--
2.21.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] target/ppc: Fix typo in comments
2020-02-13 23:57 [PATCH v2] target/ppc: Fix typo in comments BALATON Zoltan
@ 2020-02-15 4:13 ` David Gibson
0 siblings, 0 replies; 2+ messages in thread
From: David Gibson @ 2020-02-15 4:13 UTC (permalink / raw)
To: BALATON Zoltan; +Cc: qemu-trivial, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 3039 bytes --]
On Fri, Feb 14, 2020 at 12:57:34AM +0100, BALATON Zoltan wrote:
> "Deferred" was misspelled as "differed" in some comments, correct this
> typo,
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
I've replaced the earlier version in my tree.
> ---
> v2: Found one more where even the typo was misspelled
>
> target/ppc/fpu_helper.c | 4 ++--
> target/ppc/translate/fp-impl.inc.c | 6 +++---
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
> index dc383242f7..ae43b08eb5 100644
> --- a/target/ppc/fpu_helper.c
> +++ b/target/ppc/fpu_helper.c
> @@ -293,7 +293,7 @@ static void float_invalid_op_vxvc(CPUPPCState *env, bool set_fpcc,
> env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_VXVC;
> /* Update the floating-point enabled exception summary */
> env->fpscr |= FP_FEX;
> - /* Exception is differed */
> + /* Exception is deferred */
> }
> }
>
> @@ -644,7 +644,7 @@ static void do_float_check_status(CPUPPCState *env, uintptr_t raddr)
>
> if (cs->exception_index == POWERPC_EXCP_PROGRAM &&
> (env->error_code & POWERPC_EXCP_FP)) {
> - /* Differred floating-point exception after target FPR update */
> + /* Deferred floating-point exception after target FPR update */
> if (fp_exceptions_enabled(env)) {
> raise_exception_err_ra(env, cs->exception_index,
> env->error_code, raddr);
> diff --git a/target/ppc/translate/fp-impl.inc.c b/target/ppc/translate/fp-impl.inc.c
> index d8e27bf4d5..9f7868ee28 100644
> --- a/target/ppc/translate/fp-impl.inc.c
> +++ b/target/ppc/translate/fp-impl.inc.c
> @@ -781,7 +781,7 @@ static void gen_mtfsb1(DisasContext *ctx)
> tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
> tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
> }
> - /* We can raise a differed exception */
> + /* We can raise a deferred exception */
> gen_helper_float_check_status(cpu_env);
> }
>
> @@ -817,7 +817,7 @@ static void gen_mtfsf(DisasContext *ctx)
> tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
> tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
> }
> - /* We can raise a differed exception */
> + /* We can raise a deferred exception */
> gen_helper_float_check_status(cpu_env);
> tcg_temp_free_i64(t1);
> }
> @@ -850,7 +850,7 @@ static void gen_mtfsfi(DisasContext *ctx)
> tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
> tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
> }
> - /* We can raise a differed exception */
> + /* We can raise a deferred exception */
> gen_helper_float_check_status(cpu_env);
> }
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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