* [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly
@ 2023-07-07 3:23 yang.zhang
2023-07-07 7:16 ` Daniel Henrique Barboza
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: yang.zhang @ 2023-07-07 3:23 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-riscv, palmer, alistair.francis, bin.meng, pbonzini, kvm,
zhiwei_liu, dbarboza, yang.zhang
From: "yang.zhang" <yang.zhang@hexintek.com>
Should set/get riscv all reg timer,i.e, time/compare/frequency/state.
Signed-off-by:Yang Zhang <yang.zhang@hexintek.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1688
---
target/riscv/kvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index 30f21453d6..0c567f668c 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -99,7 +99,7 @@ static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
#define KVM_RISCV_SET_TIMER(cs, env, name, reg) \
do { \
- int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, time), ®); \
+ int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, name), ®); \
if (ret) { \
abort(); \
} \
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly
2023-07-07 3:23 [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly yang.zhang
@ 2023-07-07 7:16 ` Daniel Henrique Barboza
2023-07-10 0:55 ` Alistair Francis
2023-07-10 1:01 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Daniel Henrique Barboza @ 2023-07-07 7:16 UTC (permalink / raw)
To: yang.zhang, qemu-devel
Cc: qemu-riscv, palmer, alistair.francis, bin.meng, pbonzini, kvm,
zhiwei_liu, yang.zhang
On 7/7/23 00:23, yang.zhang wrote:
> From: "yang.zhang" <yang.zhang@hexintek.com>
>
> Should set/get riscv all reg timer,i.e, time/compare/frequency/state.
Nice catch.
The reason why this went under the radar for 18 months is because kvm.c is using
an external 'time' variable.
>
> Signed-off-by:Yang Zhang <yang.zhang@hexintek.com>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1688
> ---
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> target/riscv/kvm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index 30f21453d6..0c567f668c 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -99,7 +99,7 @@ static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
>
> #define KVM_RISCV_SET_TIMER(cs, env, name, reg) \
> do { \
> - int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, time), ®); \
> + int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, name), ®); \
> if (ret) { \
> abort(); \
> } \
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly
2023-07-07 3:23 [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly yang.zhang
2023-07-07 7:16 ` Daniel Henrique Barboza
@ 2023-07-10 0:55 ` Alistair Francis
2023-07-10 1:01 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2023-07-10 0:55 UTC (permalink / raw)
To: yang.zhang
Cc: qemu-devel, qemu-riscv, palmer, alistair.francis, bin.meng,
pbonzini, kvm, zhiwei_liu, dbarboza, yang.zhang
On Fri, Jul 7, 2023 at 10:26 PM yang.zhang <gaoshanliukou@163.com> wrote:
>
> From: "yang.zhang" <yang.zhang@hexintek.com>
>
> Should set/get riscv all reg timer,i.e, time/compare/frequency/state.
>
> Signed-off-by:Yang Zhang <yang.zhang@hexintek.com>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1688
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/kvm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index 30f21453d6..0c567f668c 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -99,7 +99,7 @@ static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
>
> #define KVM_RISCV_SET_TIMER(cs, env, name, reg) \
> do { \
> - int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, time), ®); \
> + int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, name), ®); \
> if (ret) { \
> abort(); \
> } \
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly
2023-07-07 3:23 [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly yang.zhang
2023-07-07 7:16 ` Daniel Henrique Barboza
2023-07-10 0:55 ` Alistair Francis
@ 2023-07-10 1:01 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2023-07-10 1:01 UTC (permalink / raw)
To: yang.zhang
Cc: qemu-devel, qemu-riscv, palmer, alistair.francis, bin.meng,
pbonzini, kvm, zhiwei_liu, dbarboza, yang.zhang
On Fri, Jul 7, 2023 at 10:26 PM yang.zhang <gaoshanliukou@163.com> wrote:
>
> From: "yang.zhang" <yang.zhang@hexintek.com>
>
> Should set/get riscv all reg timer,i.e, time/compare/frequency/state.
>
> Signed-off-by:Yang Zhang <yang.zhang@hexintek.com>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1688
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/kvm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index 30f21453d6..0c567f668c 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -99,7 +99,7 @@ static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
>
> #define KVM_RISCV_SET_TIMER(cs, env, name, reg) \
> do { \
> - int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, time), ®); \
> + int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, name), ®); \
> if (ret) { \
> abort(); \
> } \
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-07-10 1:02 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2023-07-07 3:23 [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly yang.zhang
2023-07-07 7:16 ` Daniel Henrique Barboza
2023-07-10 0:55 ` Alistair Francis
2023-07-10 1:01 ` Alistair Francis
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