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From: Andrew Jones <ajones@ventanamicro.com>
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	rkanwal@rivosinc.com,  anup@brainfault.org,
	dbarboza@ventanamicro.com, atishp@atishpatra.org,
	 vincent.chen@sifive.com, greentime.hu@sifive.com,
	frank.chang@sifive.com,  jim.shu@sifive.com,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Alistair Francis <alistair.francis@wdc.com>,
	Bin Meng <bin.meng@windriver.com>,
	Weiwei Li <liweiwei@iscas.ac.cn>,
	Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	 Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org
Subject: Re: [PATCH v6 3/5] target/riscv: Create an KVM AIA irqchip
Date: Fri, 21 Jul 2023 19:41:18 +0200	[thread overview]
Message-ID: <20230721-72cb5810011b0a676b359d36@orel> (raw)
In-Reply-To: <20230714084429.22349-4-yongxuan.wang@sifive.com>

On Fri, Jul 14, 2023 at 08:44:25AM +0000, Yong-Xuan Wang wrote:
> We create a vAIA chip by using the KVM_DEV_TYPE_RISCV_AIA and then set up
> the chip with the KVM_DEV_RISCV_AIA_GRP_* APIs.
> 
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
> Reviewed-by: Jim Shu <jim.shu@sifive.com>
> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
>  target/riscv/kvm.c       | 160 +++++++++++++++++++++++++++++++++++++++
>  target/riscv/kvm_riscv.h |   6 ++
>  2 files changed, 166 insertions(+)
> 
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index 005e054604..9bc92cedff 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -36,6 +36,7 @@
>  #include "exec/address-spaces.h"
>  #include "hw/boards.h"
>  #include "hw/irq.h"
> +#include "hw/intc/riscv_imsic.h"
>  #include "qemu/log.h"
>  #include "hw/loader.h"
>  #include "kvm_riscv.h"
> @@ -43,6 +44,7 @@
>  #include "chardev/char-fe.h"
>  #include "migration/migration.h"
>  #include "sysemu/runstate.h"
> +#include "hw/riscv/numa.h"
>  
>  static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
>                                   uint64_t idx)
> @@ -1026,3 +1028,161 @@ bool kvm_arch_cpu_check_are_resettable(void)
>  void kvm_arch_accel_class_init(ObjectClass *oc)
>  {
>  }
> +
> +char *kvm_aia_mode_str(uint64_t aia_mode)
> +{
> +    const char *val;

I just tried compiling this series and see it doesn't with -Werror.
kvm_aia_mode_str() should return 'const char *' and this 'val' variable
is unused.

Thanks,
drew


  reply	other threads:[~2023-07-21 17:42 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-14  8:44 [PATCH v6 0/5] Add RISC-V KVM AIA Support Yong-Xuan Wang
2023-07-14  8:44 ` [PATCH v6 1/5] target/riscv: support the AIA device emulation with KVM enabled Yong-Xuan Wang
2023-07-14  8:44 ` [PATCH v6 2/5] target/riscv: check the in-kernel irqchip support Yong-Xuan Wang
2023-07-14  8:44 ` [PATCH v6 3/5] target/riscv: Create an KVM AIA irqchip Yong-Xuan Wang
2023-07-21 17:41   ` Andrew Jones [this message]
2023-07-14  8:44 ` [PATCH v6 4/5] target/riscv: update APLIC and IMSIC to support KVM AIA Yong-Xuan Wang
2023-07-14  8:44 ` [PATCH v6 5/5] target/riscv: select KVM AIA in riscv virt machine Yong-Xuan Wang
2023-07-21 18:06   ` Andrew Jones

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