* [PATCH v3] target/riscv: Use env_archcpu for better performance
@ 2023-10-09 12:48 Richard W.M. Jones
2023-10-09 12:48 ` Richard W.M. Jones
0 siblings, 1 reply; 6+ messages in thread
From: Richard W.M. Jones @ 2023-10-09 12:48 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-riscv, palmer, alistair.francis, bin.meng, liweiwei,
dbarboza, zhiwei_liu, pbonzini, philmd
In v3:
- Use env_archcpu
- Rerun the benchmark to get new "after" figures
Rich.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v3] target/riscv: Use env_archcpu for better performance
2023-10-09 12:48 [PATCH v3] target/riscv: Use env_archcpu for better performance Richard W.M. Jones
@ 2023-10-09 12:48 ` Richard W.M. Jones
2023-10-09 13:47 ` Philippe Mathieu-Daudé
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Richard W.M. Jones @ 2023-10-09 12:48 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-riscv, palmer, alistair.francis, bin.meng, liweiwei,
dbarboza, zhiwei_liu, pbonzini, philmd
RISCV_CPU(cs) uses a checked cast. When QOM cast debugging is enabled
this adds about 5% total overhead when emulating RV64 on x86-64 host.
Using a RISC-V guest with 16 vCPUs, 16 GB of guest RAM, virtio-blk
disk. The guest has a copy of the qemu source tree. The test
involves compiling the qemu source tree with 'make clean; time make -j16'.
Before making this change the compile step took 449 & 447 seconds over
two consecutive runs.
After making this change: 428 & 421 seconds.
The saving is over 5%.
Thanks: Paolo Bonzini
Thanks: Philippe Mathieu-Daudé
Signed-off-by: Richard W.M. Jones <rjones@redhat.com>
---
target/riscv/cpu_helper.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 3a02079290..8c28241c18 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -65,8 +65,7 @@ int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc,
uint64_t *cs_base, uint32_t *pflags)
{
- CPUState *cs = env_cpu(env);
- RISCVCPU *cpu = RISCV_CPU(cs);
+ RISCVCPU *cpu = env_archcpu(env);
RISCVExtStatus fs, vs;
uint32_t flags = 0;
--
2.41.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v3] target/riscv: Use env_archcpu for better performance
2023-10-09 12:48 ` Richard W.M. Jones
@ 2023-10-09 13:47 ` Philippe Mathieu-Daudé
2023-10-10 16:48 ` Richard Henderson
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-09 13:47 UTC (permalink / raw)
To: Richard W.M. Jones, qemu-devel
Cc: qemu-riscv, palmer, alistair.francis, bin.meng, liweiwei,
dbarboza, zhiwei_liu, pbonzini
On 9/10/23 14:48, Richard W.M. Jones wrote:
> RISCV_CPU(cs) uses a checked cast. When QOM cast debugging is enabled
> this adds about 5% total overhead when emulating RV64 on x86-64 host.
>
> Using a RISC-V guest with 16 vCPUs, 16 GB of guest RAM, virtio-blk
> disk. The guest has a copy of the qemu source tree. The test
> involves compiling the qemu source tree with 'make clean; time make -j16'.
>
> Before making this change the compile step took 449 & 447 seconds over
> two consecutive runs.
>
> After making this change: 428 & 421 seconds.
>
> The saving is over 5%.
>
> Thanks: Paolo Bonzini
> Thanks: Philippe Mathieu-Daudé
> Signed-off-by: Richard W.M. Jones <rjones@redhat.com>
> ---
> target/riscv/cpu_helper.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3] target/riscv: Use env_archcpu for better performance
2023-10-09 12:48 ` Richard W.M. Jones
2023-10-09 13:47 ` Philippe Mathieu-Daudé
@ 2023-10-10 16:48 ` Richard Henderson
2023-10-11 1:09 ` Alistair Francis
2023-10-11 1:19 ` Alistair Francis
3 siblings, 0 replies; 6+ messages in thread
From: Richard Henderson @ 2023-10-10 16:48 UTC (permalink / raw)
To: Richard W.M. Jones, qemu-devel
Cc: qemu-riscv, palmer, alistair.francis, bin.meng, liweiwei,
dbarboza, zhiwei_liu, pbonzini, philmd
On 10/9/23 05:48, Richard W.M. Jones wrote:
> RISCV_CPU(cs) uses a checked cast. When QOM cast debugging is enabled
> this adds about 5% total overhead when emulating RV64 on x86-64 host.
>
> Using a RISC-V guest with 16 vCPUs, 16 GB of guest RAM, virtio-blk
> disk. The guest has a copy of the qemu source tree. The test
> involves compiling the qemu source tree with 'make clean; time make -j16'.
>
> Before making this change the compile step took 449 & 447 seconds over
> two consecutive runs.
>
> After making this change: 428 & 421 seconds.
>
> The saving is over 5%.
>
> Thanks: Paolo Bonzini
> Thanks: Philippe Mathieu-Daudé
> Signed-off-by: Richard W.M. Jones <rjones@redhat.com>
> ---
> target/riscv/cpu_helper.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3] target/riscv: Use env_archcpu for better performance
2023-10-09 12:48 ` Richard W.M. Jones
2023-10-09 13:47 ` Philippe Mathieu-Daudé
2023-10-10 16:48 ` Richard Henderson
@ 2023-10-11 1:09 ` Alistair Francis
2023-10-11 1:19 ` Alistair Francis
3 siblings, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2023-10-11 1:09 UTC (permalink / raw)
To: Richard W.M. Jones
Cc: qemu-devel, qemu-riscv, palmer, alistair.francis, bin.meng,
liweiwei, dbarboza, zhiwei_liu, pbonzini, philmd
On Mon, Oct 9, 2023 at 10:50 PM Richard W.M. Jones <rjones@redhat.com> wrote:
>
> RISCV_CPU(cs) uses a checked cast. When QOM cast debugging is enabled
> this adds about 5% total overhead when emulating RV64 on x86-64 host.
>
> Using a RISC-V guest with 16 vCPUs, 16 GB of guest RAM, virtio-blk
> disk. The guest has a copy of the qemu source tree. The test
> involves compiling the qemu source tree with 'make clean; time make -j16'.
>
> Before making this change the compile step took 449 & 447 seconds over
> two consecutive runs.
>
> After making this change: 428 & 421 seconds.
>
> The saving is over 5%.
>
> Thanks: Paolo Bonzini
> Thanks: Philippe Mathieu-Daudé
> Signed-off-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu_helper.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 3a02079290..8c28241c18 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -65,8 +65,7 @@ int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
> void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc,
> uint64_t *cs_base, uint32_t *pflags)
> {
> - CPUState *cs = env_cpu(env);
> - RISCVCPU *cpu = RISCV_CPU(cs);
> + RISCVCPU *cpu = env_archcpu(env);
> RISCVExtStatus fs, vs;
> uint32_t flags = 0;
>
> --
> 2.41.0
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3] target/riscv: Use env_archcpu for better performance
2023-10-09 12:48 ` Richard W.M. Jones
` (2 preceding siblings ...)
2023-10-11 1:09 ` Alistair Francis
@ 2023-10-11 1:19 ` Alistair Francis
3 siblings, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2023-10-11 1:19 UTC (permalink / raw)
To: Richard W.M. Jones
Cc: qemu-devel, qemu-riscv, palmer, alistair.francis, bin.meng,
liweiwei, dbarboza, zhiwei_liu, pbonzini, philmd
On Mon, Oct 9, 2023 at 10:50 PM Richard W.M. Jones <rjones@redhat.com> wrote:
>
> RISCV_CPU(cs) uses a checked cast. When QOM cast debugging is enabled
> this adds about 5% total overhead when emulating RV64 on x86-64 host.
>
> Using a RISC-V guest with 16 vCPUs, 16 GB of guest RAM, virtio-blk
> disk. The guest has a copy of the qemu source tree. The test
> involves compiling the qemu source tree with 'make clean; time make -j16'.
>
> Before making this change the compile step took 449 & 447 seconds over
> two consecutive runs.
>
> After making this change: 428 & 421 seconds.
>
> The saving is over 5%.
>
> Thanks: Paolo Bonzini
> Thanks: Philippe Mathieu-Daudé
> Signed-off-by: Richard W.M. Jones <rjones@redhat.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/cpu_helper.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 3a02079290..8c28241c18 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -65,8 +65,7 @@ int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
> void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc,
> uint64_t *cs_base, uint32_t *pflags)
> {
> - CPUState *cs = env_cpu(env);
> - RISCVCPU *cpu = RISCV_CPU(cs);
> + RISCVCPU *cpu = env_archcpu(env);
> RISCVExtStatus fs, vs;
> uint32_t flags = 0;
>
> --
> 2.41.0
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-10-11 1:20 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2023-10-09 12:48 [PATCH v3] target/riscv: Use env_archcpu for better performance Richard W.M. Jones
2023-10-09 12:48 ` Richard W.M. Jones
2023-10-09 13:47 ` Philippe Mathieu-Daudé
2023-10-10 16:48 ` Richard Henderson
2023-10-11 1:09 ` Alistair Francis
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