From: Andrew Jones <ajones@ventanamicro.com>
To: Conor Dooley <conor@kernel.org>
Cc: qemu-riscv@nongnu.org, Conor Dooley <conor.dooley@microchip.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v3 1/2] target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG_BITS
Date: Wed, 10 Jan 2024 12:37:35 +0100 [thread overview]
Message-ID: <20240110-aa3945e12c7bb11eeb87edfc@orel> (raw)
In-Reply-To: <20240110-eastward-sulfide-f365c89681e0@spud>
On Wed, Jan 10, 2024 at 10:25:36AM +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> A cpu may not have the same xlen as the compile time target, and
> misa_mxl_max is the source of truth for what the hart supports.
>
> Reported-by: Andrew Jones <ajones@ventanamicro.com>
> Link: https://lore.kernel.org/qemu-riscv/20240108-efa3f83dcd3997dc0af458d7@orel/
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> Perhaps this misa_mxl_max -> width conversion should exist as a macro?
> There's now 3 individual conversions of this type - two I added and one
> in the gdb code.
A macro is a good idea. I had to go look at Table 3.1 of the priv spec to
understand the 16 shift stuff.
> ---
> target/riscv/cpu.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 8cbfc7e781..5b5da970f2 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -1860,7 +1860,9 @@ char *riscv_isa_string(RISCVCPU *cpu)
> int i;
> const size_t maxlen = sizeof("rv128") + sizeof(riscv_single_letter_exts);
> char *isa_str = g_new(char, maxlen);
> - char *p = isa_str + snprintf(isa_str, maxlen, "rv%d", TARGET_LONG_BITS);
> + int xlen = 16 << cpu->env.misa_mxl_max;
> + char *p = isa_str + snprintf(isa_str, maxlen, "rv%d", xlen);
> +
> for (i = 0; i < sizeof(riscv_single_letter_exts) - 1; i++) {
> if (cpu->env.misa_ext & RV(riscv_single_letter_exts[i])) {
> *p++ = qemu_tolower(riscv_single_letter_exts[i]);
> --
> 2.39.2
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
next prev parent reply other threads:[~2024-01-10 11:38 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-10 10:25 [PATCH v3 0/2] riscv: support new isa extension detection devicetree properties Conor Dooley
2024-01-10 10:25 ` [PATCH v3 1/2] target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG_BITS Conor Dooley
2024-01-10 11:37 ` Andrew Jones [this message]
2024-01-22 5:17 ` Alistair Francis
2024-01-10 10:25 ` [PATCH v3 2/2] target/riscv: support new isa extension detection devicetree properties Conor Dooley
2024-01-10 11:42 ` Andrew Jones
2024-01-22 5:19 ` Alistair Francis
2024-01-22 5:24 ` [PATCH v3 0/2] riscv: " Alistair Francis
2024-01-22 12:25 ` Conor Dooley
2024-01-23 5:50 ` Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240110-aa3945e12c7bb11eeb87edfc@orel \
--to=ajones@ventanamicro.com \
--cc=Alistair.Francis@wdc.com \
--cc=bin.meng@windriver.com \
--cc=conor.dooley@microchip.com \
--cc=conor@kernel.org \
--cc=dbarboza@ventanamicro.com \
--cc=liwei1518@gmail.com \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).