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From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	bmeng@tinylab.org, liwei1518@gmail.com,
	zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
	richard.henderson@linaro.org, max.chou@sifive.com,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v5 5/7] target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
Date: Tue, 20 Feb 2024 23:22:50 -0300	[thread overview]
Message-ID: <20240221022252.252872-6-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20240221022252.252872-1-dbarboza@ventanamicro.com>

The helper isn't setting env->vstart = 0 after its execution, as it is
expected from every vector instruction that completes successfully.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/riscv/vector_helper.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 84cec73eb2..cc7290a1bb 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -4782,6 +4782,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2,         \
         }                                                                 \
         *((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i - offset));          \
     }                                                                     \
+    env->vstart = 0;                                                      \
     /* set tail elements to 1s */                                         \
     vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz);              \
 }
-- 
2.43.2



  parent reply	other threads:[~2024-02-21  2:25 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-21  2:22 [PATCH v5 0/7] riscv: set vstart_eq_zero on mark_vs_dirty Daniel Henrique Barboza
2024-02-21  2:22 ` [PATCH v5 1/7] trans_rvv.c.inc: mark_vs_dirty() before loads and stores Daniel Henrique Barboza
2024-02-21  2:22 ` [PATCH v5 2/7] trans_rvv.c.inc: remove 'is_store' bool from load/store fns Daniel Henrique Barboza
2024-02-21  8:57   ` Philippe Mathieu-Daudé
2024-02-21  2:22 ` [PATCH v5 3/7] target/riscv: remove 'over' brconds from vector trans Daniel Henrique Barboza
2024-02-21  2:22 ` [PATCH v5 4/7] target/riscv/translate.c: remove 'cpu_vstart' global Daniel Henrique Barboza
2024-02-21  2:41   ` Richard Henderson
2024-02-21  2:22 ` Daniel Henrique Barboza [this message]
2024-02-21  2:22 ` [PATCH v5 6/7] trans_rvv.c.inc: remove redundant mark_vs_dirty() calls Daniel Henrique Barboza
2024-02-21  2:22 ` [PATCH v5 7/7] target/riscv: Clear vstart_qe_zero flag Daniel Henrique Barboza
2024-02-21 21:24 ` [PATCH v5 0/7] riscv: set vstart_eq_zero on mark_vs_dirty Daniel Henrique Barboza

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