* [Qemu-devel] [PATCH] kvm: vmxcap: Enhance with latest features
@ 2019-08-13 6:29 Jan Kiszka
2019-08-13 7:57 ` Paolo Bonzini
0 siblings, 1 reply; 2+ messages in thread
From: Jan Kiszka @ 2019-08-13 6:29 UTC (permalink / raw)
To: qemu-devel, Paolo Bonzini
Based on SDM from May 2019.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
scripts/kvm/vmxcap | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
index 99a8146aaa..d8c7d6dfb8 100755
--- a/scripts/kvm/vmxcap
+++ b/scripts/kvm/vmxcap
@@ -178,7 +178,11 @@ controls = [
19: 'Conceal non-root operation from PT',
20: 'Enable XSAVES/XRSTORS',
22: 'Mode-based execute control (XS/XU)',
+ 23: 'Sub-page write permissions',
+ 24: 'GPA translation for PT',
25: 'TSC scaling',
+ 26: 'User wait and pause',
+ 28: 'ENCLV exiting',
},
cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
),
@@ -197,6 +201,7 @@ controls = [
22: 'Save VMX-preemption timer value',
23: 'Clear IA32_BNDCFGS',
24: 'Conceal VM exits from PT',
+ 25: 'Clear IA32_RTIT_CTL',
},
cap_msr = MSR_IA32_VMX_EXIT_CTLS,
true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
@@ -214,6 +219,7 @@ controls = [
15: 'Load IA32_EFER',
16: 'Load IA32_BNDCFGS',
17: 'Conceal VM entries from PT',
+ 18: 'Load IA32_RTIT_CTL',
},
cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
@@ -227,6 +233,7 @@ controls = [
6: 'HLT activity state',
7: 'Shutdown activity state',
8: 'Wait-for-SIPI activity state',
+ 14: 'PT in VMX operation',
15: 'IA32_SMBASE support',
(16,24): 'Number of CR3-target values',
(25,27): 'MSR-load/store count recommendation',
@@ -249,6 +256,7 @@ controls = [
17: '1GB EPT pages',
20: 'INVEPT supported',
21: 'EPT accessed and dirty flags',
+ 22: 'Advanced VM-exit information for EPT violations',
25: 'Single-context INVEPT',
26: 'All-context INVEPT',
32: 'INVVPID supported',
--
2.16.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] kvm: vmxcap: Enhance with latest features
2019-08-13 6:29 [Qemu-devel] [PATCH] kvm: vmxcap: Enhance with latest features Jan Kiszka
@ 2019-08-13 7:57 ` Paolo Bonzini
0 siblings, 0 replies; 2+ messages in thread
From: Paolo Bonzini @ 2019-08-13 7:57 UTC (permalink / raw)
To: Jan Kiszka, qemu-devel
On 13/08/19 08:29, Jan Kiszka wrote:
> Based on SDM from May 2019.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
> scripts/kvm/vmxcap | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
> index 99a8146aaa..d8c7d6dfb8 100755
> --- a/scripts/kvm/vmxcap
> +++ b/scripts/kvm/vmxcap
> @@ -178,7 +178,11 @@ controls = [
> 19: 'Conceal non-root operation from PT',
> 20: 'Enable XSAVES/XRSTORS',
> 22: 'Mode-based execute control (XS/XU)',
> + 23: 'Sub-page write permissions',
> + 24: 'GPA translation for PT',
> 25: 'TSC scaling',
> + 26: 'User wait and pause',
> + 28: 'ENCLV exiting',
> },
> cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
> ),
> @@ -197,6 +201,7 @@ controls = [
> 22: 'Save VMX-preemption timer value',
> 23: 'Clear IA32_BNDCFGS',
> 24: 'Conceal VM exits from PT',
> + 25: 'Clear IA32_RTIT_CTL',
> },
> cap_msr = MSR_IA32_VMX_EXIT_CTLS,
> true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
> @@ -214,6 +219,7 @@ controls = [
> 15: 'Load IA32_EFER',
> 16: 'Load IA32_BNDCFGS',
> 17: 'Conceal VM entries from PT',
> + 18: 'Load IA32_RTIT_CTL',
> },
> cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
> true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
> @@ -227,6 +233,7 @@ controls = [
> 6: 'HLT activity state',
> 7: 'Shutdown activity state',
> 8: 'Wait-for-SIPI activity state',
> + 14: 'PT in VMX operation',
> 15: 'IA32_SMBASE support',
> (16,24): 'Number of CR3-target values',
> (25,27): 'MSR-load/store count recommendation',
> @@ -249,6 +256,7 @@ controls = [
> 17: '1GB EPT pages',
> 20: 'INVEPT supported',
> 21: 'EPT accessed and dirty flags',
> + 22: 'Advanced VM-exit information for EPT violations',
> 25: 'Single-context INVEPT',
> 26: 'All-context INVEPT',
> 32: 'INVVPID supported',
>
Queued, thanks.
Paolo
^ permalink raw reply [flat|nested] 2+ messages in thread
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