From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Michael Rolnik <mrolnik@gmail.com>, qemu-devel@nongnu.org
Cc: thuth@redhat.com, me@xcancerberox.com.ar,
richard.henderson@linaro.org, dovgaluk@ispras.ru,
imammedo@redhat.com, aleksandar.m.mail@gmail.com
Subject: Re: [PATCH v37 02/17] target/avr: Add instruction helpers
Date: Wed, 27 Nov 2019 23:26:56 +0100 [thread overview]
Message-ID: <5cd26af6-abb0-435e-e4b0-13152ba1c3db@redhat.com> (raw)
In-Reply-To: <20191127175257.23480-3-mrolnik@gmail.com>
On 11/27/19 6:52 PM, Michael Rolnik wrote:
> Stubs for unimplemented instructions and helpers for instructions that need to interact with QEMU.
> SPM and WDR are unimplemented because they require emulation of complex peripherals.
> The implementation of SLEEP is very limited due to the lack of peripherals to generate wake interrupts.
> Memory access instructions are implemented here because some address ranges actually refer to CPU registers.
>
> Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> target/avr/helper.h | 29 ++++
> target/avr/helper.c | 354 ++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 383 insertions(+)
> create mode 100644 target/avr/helper.h
> create mode 100644 target/avr/helper.c
>
> diff --git a/target/avr/helper.h b/target/avr/helper.h
> new file mode 100644
> index 0000000000..bf087504a8
> --- /dev/null
> +++ b/target/avr/helper.h
> @@ -0,0 +1,29 @@
> +/*
> + * QEMU AVR CPU
> + *
> + * Copyright (c) 2019 Michael Rolnik
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see
> + * <http://www.gnu.org/licenses/lgpl-2.1.html>
> + */
> +
> +DEF_HELPER_1(wdr, void, env)
> +DEF_HELPER_1(debug, void, env)
> +DEF_HELPER_1(break, void, env)
> +DEF_HELPER_1(sleep, void, env)
> +DEF_HELPER_1(unsupported, void, env)
> +DEF_HELPER_3(outb, void, env, i32, i32)
> +DEF_HELPER_2(inb, tl, env, i32)
> +DEF_HELPER_3(fullwr, void, env, i32, i32)
> +DEF_HELPER_2(fullrd, tl, env, i32)
> diff --git a/target/avr/helper.c b/target/avr/helper.c
> new file mode 100644
> index 0000000000..f1939bd5a7
> --- /dev/null
> +++ b/target/avr/helper.c
> @@ -0,0 +1,354 @@
> +/*
> + * QEMU AVR CPU
> + *
> + * Copyright (c) 2019 Michael Rolnik
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see
> + * <http://www.gnu.org/licenses/lgpl-2.1.html>
> + */
> +
> +#include "qemu/osdep.h"
> +
> +#include "cpu.h"
> +#include "hw/irq.h"
Nitpicking again, the previous include doesn't seem used.
> +#include "hw/sysbus.h"
> +#include "sysemu/sysemu.h"
> +#include "exec/exec-all.h"
> +#include "exec/cpu_ldst.h"
> +#include "exec/helper-proto.h"
> +#include "exec/ioport.h"
> +#include "qemu/host-utils.h"
> +#include "qemu/error-report.h"
> +
> +bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
> +{
> + bool ret = false;
> + CPUClass *cc = CPU_GET_CLASS(cs);
> + AVRCPU *cpu = AVR_CPU(cs);
> + CPUAVRState *env = &cpu->env;
> +
> + if (interrupt_request & CPU_INTERRUPT_RESET) {
> + if (cpu_interrupts_enabled(env)) {
> + cs->exception_index = EXCP_RESET;
> + cc->do_interrupt(cs);
> +
> + cs->interrupt_request &= ~CPU_INTERRUPT_RESET;
> +
> + ret = true;
> + }
> + }
> + if (interrupt_request & CPU_INTERRUPT_HARD) {
> + if (cpu_interrupts_enabled(env) && env->intsrc != 0) {
> + int index = ctz32(env->intsrc);
> + cs->exception_index = EXCP_INT(index);
> + cc->do_interrupt(cs);
> +
> + env->intsrc &= env->intsrc - 1; /* clear the interrupt */
> + cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
> +
> + ret = true;
> + }
> + }
> + return ret;
> +}
> +
> +void avr_cpu_do_interrupt(CPUState *cs)
> +{
> + AVRCPU *cpu = AVR_CPU(cs);
> + CPUAVRState *env = &cpu->env;
> +
> + uint32_t ret = env->pc_w;
> + int vector = 0;
> + int size = avr_feature(env, AVR_FEATURE_JMP_CALL) ? 2 : 1;
> + int base = 0;
> +
> + if (cs->exception_index == EXCP_RESET) {
> + vector = 0;
> + } else if (env->intsrc != 0) {
> + vector = ctz32(env->intsrc) + 1;
> + }
> +
> + if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) {
> + cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
> + cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8);
> + cpu_stb_data(env, env->sp--, (ret & 0xff0000) >> 16);
> + } else if (avr_feature(env, AVR_FEATURE_2_BYTE_PC)) {
> + cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
> + cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8);
> + } else {
> + cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
> + }
> +
> + env->pc_w = base + vector * size;
> + env->sregI = 0; /* clear Global Interrupt Flag */
> +
> + cs->exception_index = -1;
> +}
[...]
next prev parent reply other threads:[~2019-11-27 22:28 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-27 17:52 [PATCH v37 00/17] QEMU AVR 8 bit cores Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 01/17] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-11-27 22:25 ` Philippe Mathieu-Daudé
2019-11-28 12:04 ` Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 02/17] target/avr: Add instruction helpers Michael Rolnik
2019-11-27 22:26 ` Philippe Mathieu-Daudé [this message]
2019-11-27 17:52 ` [PATCH v37 03/17] target/avr: Add instruction decoding Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 04/17] target/avr: Add instruction translation - Registers definition Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 05/17] target/avr: Add instruction translation - Arithmetic and Logic Instructions Michael Rolnik
2019-11-30 10:33 ` Aleksandar Markovic
2019-11-30 16:29 ` Aleksandar Markovic
2019-11-30 17:05 ` Michael Rolnik
2019-11-30 17:14 ` Aleksandar Markovic
2019-11-30 23:11 ` Aleksandar Markovic
2019-12-02 7:41 ` Michael Rolnik
2019-12-02 8:55 ` Aleksandar Markovic
2019-12-02 9:01 ` Aleksandar Markovic
2019-11-27 17:52 ` [PATCH v37 06/17] target/avr: Add instruction translation - Branch Instructions Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 07/17] target/avr: Add instruction translation - Bit and Bit-test Instructions Michael Rolnik
2019-12-05 12:28 ` Aleksandar Markovic
2019-12-05 13:17 ` Michael Rolnik
2019-12-05 13:28 ` Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 08/17] target/avr: Add instruction translation - MCU Control Instructions Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 09/17] target/avr: Add instruction translation - CPU main translation function Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 10/17] target/avr: Add instruction disassembly function Michael Rolnik
2019-12-02 0:28 ` Aleksandar Markovic
2019-12-02 7:04 ` Michael Rolnik
2019-12-02 10:12 ` Aleksandar Markovic
2019-12-02 12:01 ` Aleksandar Markovic
2019-12-03 11:18 ` Philippe Mathieu-Daudé
2019-12-03 14:24 ` Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 11/17] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 12/17] target/avr: Add example board configuration Michael Rolnik
2019-11-30 10:49 ` Aleksandar Markovic
2019-11-30 16:57 ` Michael Rolnik
2019-12-03 11:29 ` Philippe Mathieu-Daudé
2019-11-27 17:52 ` [PATCH v37 13/17] target/avr: Register AVR support with the rest of QEMU Michael Rolnik
2019-12-05 12:55 ` Aleksandar Markovic
2019-11-27 17:52 ` [PATCH v37 14/17] target/avr: Update build system Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 15/17] target/avr: Add boot serial test Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 16/17] target/avr: Add Avocado test Michael Rolnik
2019-11-27 17:52 ` [PATCH v37 17/17] target/avr: Update MAINTAINERS file Michael Rolnik
2019-11-28 20:19 ` Philippe Mathieu-Daudé
2019-11-30 13:43 ` Aleksandar Markovic
2019-11-27 21:06 ` [PATCH v37 00/17] QEMU AVR 8 bit cores Aleksandar Markovic
2019-11-28 12:28 ` Michael Rolnik
2019-11-28 13:22 ` Aleksandar Markovic
2019-11-28 13:25 ` Michael Rolnik
2019-11-28 13:31 ` Aleksandar Markovic
2019-11-28 16:20 ` Alex Bennée
2019-11-28 19:32 ` Aleksandar Markovic
2019-11-29 22:49 ` Aleksandar Markovic
2019-11-29 23:52 ` Aleksandar Markovic
2019-11-28 13:34 ` Philippe Mathieu-Daudé
2019-11-28 13:41 ` Aleksandar Markovic
2019-11-28 13:46 ` Michael Rolnik
2019-11-28 14:16 ` Philippe Mathieu-Daudé
2019-11-28 14:50 ` Aleksandar Markovic
2019-11-28 18:09 ` Aleksandar Markovic
2019-12-01 13:09 ` Aleksandar Markovic
2019-12-01 13:11 ` Aleksandar Markovic
2019-11-29 9:24 ` Sarah Harris
2019-11-28 15:00 ` Aleksandar Markovic
2019-11-30 11:28 ` Aleksandar Markovic
2019-11-30 17:00 ` Michael Rolnik
2019-12-02 9:35 ` Aleksandar Markovic
2019-12-02 9:59 ` Aleksandar Markovic
2019-12-02 13:24 ` Michael Rolnik
2019-12-02 14:01 ` Aleksandar Markovic
2019-12-02 16:09 ` Michael Rolnik
2019-12-02 21:15 ` Aleksandar Markovic
2019-12-02 23:37 ` Aleksandar Markovic
2019-12-03 1:17 ` Aleksandar Markovic
2019-12-03 1:48 ` Aleksandar Markovic
2019-12-03 9:56 ` Michael Rolnik
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