From: Paolo Bonzini <pbonzini@redhat.com>
To: David Hildenbrand <david@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org, stefanha@redhat.com
Subject: Re: [PATCH v3 09/20] cputlb: Replace switches in load/store_helper with callback
Date: Mon, 23 Sep 2019 12:02:11 +0200 [thread overview]
Message-ID: <9c254159-9b63-b66e-dca7-af3d30167f49@redhat.com> (raw)
In-Reply-To: <b9e498eb-6d63-11a6-01d8-1a32f5b14236@redhat.com>
On 23/09/19 11:54, David Hildenbrand wrote:
> On 23.09.19 11:51, Paolo Bonzini wrote:
>> On 22/09/19 05:54, Richard Henderson wrote:
>>> +/* Wrap the unaligned load helpers to that they have a common signature. */
>>> +static inline uint64_t wrap_ldub(const void *haddr)
>>> +{
>>> + return ldub_p(haddr);
>>> +}
>>> +
>>> +static inline uint64_t wrap_lduw_be(const void *haddr)
>>> +{
>>> + return lduw_be_p(haddr);
>>> +}
>>> +
>>> +static inline uint64_t wrap_lduw_le(const void *haddr)
>>> +{
>>> + return lduw_le_p(haddr);
>>> +}
>>> +
>>> +static inline uint64_t wrap_ldul_be(const void *haddr)
>>> +{
>>> + return (uint32_t)ldl_be_p(haddr);
>>> +}
>>> +
>>> +static inline uint64_t wrap_ldul_le(const void *haddr)
>>> +{
>>> + return (uint32_t)ldl_le_p(haddr);
>>> +}
>>
>> Any reason to have these five functions (plus five for stores) instead
>> of a pair
>>
>> static uint64_t ld_memop(const void *haddr, MemOp op)
>> {
>> }
>>
>> static uint64_t st_memop(void *haddr, MemOp op, uint64_t val)
>> {
>> }
>>
>> that includes the switches? Everything should be inlined just the same
>> if you do
>>
>> if (unlikely(tlb_addr & TLB_BSWAP)) {
>> st_memop(haddr, op ^ MO_BSWAP, val);
>> } else {
>> st_memop(haddr, op, val);
>> }
>
> I asked the same question on v2 and Richard explained that - for
> whatever reason - the compiler will not properly propagate the constant
> in the "op ^ MO_BSWAP" case.
Even if ld_memop and st_memop are __always_inline__?
Paolo
next prev parent reply other threads:[~2019-09-23 10:03 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-22 3:54 [PATCH v3 00/20] Move rom and notdirty handling to cputlb Richard Henderson
2019-09-22 3:54 ` [PATCH v3 01/20] exec: Use TARGET_PAGE_BITS_MIN for TLB flags Richard Henderson
2019-09-23 8:24 ` David Hildenbrand
2019-09-22 3:54 ` [PATCH v3 02/20] exec: Split out variable page size support to exec-vary.c Richard Henderson
2019-09-23 8:26 ` David Hildenbrand
2019-09-23 16:27 ` Richard Henderson
2019-09-22 3:54 ` [PATCH v3 03/20] exec: Use const alias for TARGET_PAGE_BITS_VARY Richard Henderson
2019-09-22 3:54 ` [PATCH v3 04/20] exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG Richard Henderson
2019-09-22 3:54 ` [PATCH v3 05/20] exec: Promote TARGET_PAGE_MASK to target_long Richard Henderson
2019-09-23 8:30 ` David Hildenbrand
2019-09-22 3:54 ` [PATCH v3 06/20] exec: Tidy TARGET_PAGE_ALIGN Richard Henderson
2019-09-23 8:30 ` David Hildenbrand
2019-09-22 3:54 ` [PATCH v3 07/20] exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY Richard Henderson
2019-09-23 8:31 ` David Hildenbrand
2019-09-22 3:54 ` [PATCH v3 08/20] cputlb: Disable __always_inline__ without optimization Richard Henderson
2019-09-23 9:18 ` Philippe Mathieu-Daudé
2019-09-23 9:45 ` Paolo Bonzini
2019-09-23 16:00 ` Richard Henderson
2019-09-23 16:49 ` Paolo Bonzini
2019-09-23 18:09 ` Richard Henderson
2019-09-22 3:54 ` [PATCH v3 09/20] cputlb: Replace switches in load/store_helper with callback Richard Henderson
2019-09-23 8:32 ` David Hildenbrand
2019-09-23 9:27 ` Philippe Mathieu-Daudé
2019-09-23 9:51 ` Paolo Bonzini
2019-09-23 9:54 ` David Hildenbrand
2019-09-23 10:02 ` Paolo Bonzini [this message]
2019-09-23 15:52 ` Richard Henderson
2019-09-23 18:18 ` Richard Henderson
2019-09-22 3:54 ` [PATCH v3 10/20] cputlb: Introduce TLB_BSWAP Richard Henderson
2019-09-23 8:33 ` David Hildenbrand
2019-09-22 3:54 ` [PATCH v3 11/20] exec: Adjust notdirty tracing Richard Henderson
2019-09-23 9:17 ` Philippe Mathieu-Daudé
2019-09-22 3:54 ` [PATCH v3 12/20] cputlb: Move ROM handling from I/O path to TLB path Richard Henderson
2019-09-23 8:39 ` David Hildenbrand
2019-09-22 3:54 ` [PATCH v3 13/20] cputlb: Move NOTDIRTY " Richard Henderson
2019-09-23 8:41 ` David Hildenbrand
2019-09-23 9:30 ` Philippe Mathieu-Daudé
2019-09-22 3:54 ` [PATCH v3 14/20] cputlb: Partially inline memory_region_section_get_iotlb Richard Henderson
2019-09-22 3:54 ` [PATCH v3 15/20] cputlb: Merge and move memory_notdirty_write_{prepare, complete} Richard Henderson
2019-09-22 3:54 ` [PATCH v3 16/20] cputlb: Handle TLB_NOTDIRTY in probe_access Richard Henderson
2019-09-22 3:54 ` [PATCH v3 17/20] cputlb: Remove cpu->mem_io_vaddr Richard Henderson
2019-09-23 8:50 ` David Hildenbrand
2019-09-22 3:54 ` [PATCH v3 18/20] cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access Richard Henderson
2019-09-23 8:52 ` David Hildenbrand
2019-09-23 16:05 ` Richard Henderson
2019-09-23 16:50 ` Paolo Bonzini
2019-09-22 3:54 ` [PATCH v3 19/20] cputlb: Pass retaddr to tb_invalidate_phys_page_fast Richard Henderson
2019-09-23 8:53 ` David Hildenbrand
2019-09-22 3:54 ` [PATCH v3 20/20] cputlb: Pass retaddr to tb_check_watchpoint Richard Henderson
2019-09-23 8:54 ` David Hildenbrand
2019-09-22 4:02 ` [PATCH v3 00/20] Move rom and notdirty handling to cputlb Richard Henderson
2019-09-22 6:46 ` no-reply
2019-09-23 8:23 ` David Hildenbrand
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