qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Joel Stanley <joel@jms.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: Andrew Jeffery <andrew@aj.id.au>,
	Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH 14/24] aspeed/smc: Add a 'features' attribute to the object class
Date: Fri, 9 Apr 2021 06:55:14 +0000	[thread overview]
Message-ID: <CACPK8Xe759bbuEHybMnHyN2JsszAp41b=yq-cpnM8PnQU-N-uQ@mail.gmail.com> (raw)
In-Reply-To: <20210407171637.777743-15-clg@kaod.org>

On Wed, 7 Apr 2021 at 17:17, Cédric Le Goater <clg@kaod.org> wrote:
>
> It will simplify extensions of the SMC model.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>  include/hw/ssi/aspeed_smc.h |  2 +-
>  hw/ssi/aspeed_smc.c         | 44 +++++++++++++++++++++----------------
>  2 files changed, 26 insertions(+), 20 deletions(-)
>
> diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
> index 6ea2871cd899..07879fd1c4a7 100644
> --- a/include/hw/ssi/aspeed_smc.h
> +++ b/include/hw/ssi/aspeed_smc.h
> @@ -47,7 +47,7 @@ typedef struct AspeedSMCController {
>      const AspeedSegments *segments;
>      hwaddr flash_window_base;
>      uint32_t flash_window_size;
> -    bool has_dma;
> +    uint32_t features;
>      hwaddr dma_flash_mask;
>      hwaddr dma_dram_mask;
>      uint32_t nregs;
> diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> index 50ea907aef74..4521bbd4864e 100644
> --- a/hw/ssi/aspeed_smc.c
> +++ b/hw/ssi/aspeed_smc.c
> @@ -257,6 +257,12 @@ static uint32_t aspeed_2600_smc_segment_to_reg(const AspeedSMCState *s,
>                                                 const AspeedSegments *seg);
>  static void aspeed_2600_smc_reg_to_segment(const AspeedSMCState *s,
>                                             uint32_t reg, AspeedSegments *seg);
> +#define ASPEED_SMC_FEATURE_DMA       0x1
> +
> +static inline bool aspeed_smc_has_dma(const AspeedSMCState *s)
> +{
> +    return !!(s->ctrl->features & ASPEED_SMC_FEATURE_DMA);
> +}
>
>  static const AspeedSMCController controllers[] = {
>      {
> @@ -271,7 +277,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_legacy,
>          .flash_window_base = ASPEED_SOC_SMC_FLASH_BASE,
>          .flash_window_size = 0x6000000,
> -        .has_dma           = false,
> +        .features          = 0x0,
>          .nregs             = ASPEED_SMC_R_SMC_MAX,
>          .segment_to_reg    = aspeed_smc_segment_to_reg,
>          .reg_to_segment    = aspeed_smc_reg_to_segment,
> @@ -287,7 +293,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_fmc,
>          .flash_window_base = ASPEED_SOC_FMC_FLASH_BASE,
>          .flash_window_size = 0x10000000,
> -        .has_dma           = true,
> +        .features          = ASPEED_SMC_FEATURE_DMA,
>          .dma_flash_mask    = 0x0FFFFFFC,
>          .dma_dram_mask     = 0x1FFFFFFC,
>          .nregs             = ASPEED_SMC_R_MAX,
> @@ -305,7 +311,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_spi,
>          .flash_window_base = ASPEED_SOC_SPI_FLASH_BASE,
>          .flash_window_size = 0x10000000,
> -        .has_dma           = false,
> +        .features          = 0x0,
>          .nregs             = ASPEED_SMC_R_SPI_MAX,
>          .segment_to_reg    = aspeed_smc_segment_to_reg,
>          .reg_to_segment    = aspeed_smc_reg_to_segment,
> @@ -321,7 +327,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_ast2500_fmc,
>          .flash_window_base = ASPEED_SOC_FMC_FLASH_BASE,
>          .flash_window_size = 0x10000000,
> -        .has_dma           = true,
> +        .features          = ASPEED_SMC_FEATURE_DMA,
>          .dma_flash_mask    = 0x0FFFFFFC,
>          .dma_dram_mask     = 0x3FFFFFFC,
>          .nregs             = ASPEED_SMC_R_MAX,
> @@ -339,7 +345,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_ast2500_spi1,
>          .flash_window_base = ASPEED_SOC_SPI_FLASH_BASE,
>          .flash_window_size = 0x8000000,
> -        .has_dma           = false,
> +        .features          = 0x0,
>          .nregs             = ASPEED_SMC_R_MAX,
>          .segment_to_reg    = aspeed_smc_segment_to_reg,
>          .reg_to_segment    = aspeed_smc_reg_to_segment,
> @@ -355,7 +361,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_ast2500_spi2,
>          .flash_window_base = ASPEED_SOC_SPI2_FLASH_BASE,
>          .flash_window_size = 0x8000000,
> -        .has_dma           = false,
> +        .features          = 0x0,
>          .nregs             = ASPEED_SMC_R_MAX,
>          .segment_to_reg    = aspeed_smc_segment_to_reg,
>          .reg_to_segment    = aspeed_smc_reg_to_segment,
> @@ -371,7 +377,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_ast2600_fmc,
>          .flash_window_base = ASPEED26_SOC_FMC_FLASH_BASE,
>          .flash_window_size = 0x10000000,
> -        .has_dma           = true,
> +        .features          = ASPEED_SMC_FEATURE_DMA,
>          .dma_flash_mask    = 0x0FFFFFFC,
>          .dma_dram_mask     = 0x3FFFFFFC,
>          .nregs             = ASPEED_SMC_R_MAX,
> @@ -389,7 +395,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_ast2600_spi1,
>          .flash_window_base = ASPEED26_SOC_SPI_FLASH_BASE,
>          .flash_window_size = 0x10000000,
> -        .has_dma           = true,
> +        .features          = ASPEED_SMC_FEATURE_DMA,
>          .dma_flash_mask    = 0x0FFFFFFC,
>          .dma_dram_mask     = 0x3FFFFFFC,
>          .nregs             = ASPEED_SMC_R_MAX,
> @@ -407,7 +413,7 @@ static const AspeedSMCController controllers[] = {
>          .segments          = aspeed_segments_ast2600_spi2,
>          .flash_window_base = ASPEED26_SOC_SPI2_FLASH_BASE,
>          .flash_window_size = 0x10000000,
> -        .has_dma           = true,
> +        .features          = ASPEED_SMC_FEATURE_DMA,
>          .dma_flash_mask    = 0x0FFFFFFC,
>          .dma_dram_mask     = 0x3FFFFFFC,
>          .nregs             = ASPEED_SMC_R_MAX,
> @@ -997,11 +1003,11 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size)
>          addr == R_CE_CMD_CTRL ||
>          addr == R_INTR_CTRL ||
>          addr == R_DUMMY_DATA ||
> -        (s->ctrl->has_dma && addr == R_DMA_CTRL) ||
> -        (s->ctrl->has_dma && addr == R_DMA_FLASH_ADDR) ||
> -        (s->ctrl->has_dma && addr == R_DMA_DRAM_ADDR) ||
> -        (s->ctrl->has_dma && addr == R_DMA_LEN) ||
> -        (s->ctrl->has_dma && addr == R_DMA_CHECKSUM) ||
> +        (aspeed_smc_has_dma(s) && addr == R_DMA_CTRL) ||
> +        (aspeed_smc_has_dma(s) && addr == R_DMA_FLASH_ADDR) ||
> +        (aspeed_smc_has_dma(s) && addr == R_DMA_DRAM_ADDR) ||
> +        (aspeed_smc_has_dma(s) && addr == R_DMA_LEN) ||
> +        (aspeed_smc_has_dma(s) && addr == R_DMA_CHECKSUM) ||
>          (addr >= R_SEG_ADDR0 &&
>           addr < R_SEG_ADDR0 + s->ctrl->max_peripherals) ||
>          (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_peripherals)) {
> @@ -1290,13 +1296,13 @@ static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data,
>          s->regs[addr] = value & 0xff;
>      } else if (addr == R_INTR_CTRL) {
>          s->regs[addr] = value;
> -    } else if (s->ctrl->has_dma && addr == R_DMA_CTRL) {
> +    } else if (aspeed_smc_has_dma(s) && addr == R_DMA_CTRL) {
>          aspeed_smc_dma_ctrl(s, value);
> -    } else if (s->ctrl->has_dma && addr == R_DMA_DRAM_ADDR) {
> +    } else if (aspeed_smc_has_dma(s) && addr == R_DMA_DRAM_ADDR) {
>          s->regs[addr] = DMA_DRAM_ADDR(s, value);
> -    } else if (s->ctrl->has_dma && addr == R_DMA_FLASH_ADDR) {
> +    } else if (aspeed_smc_has_dma(s) && addr == R_DMA_FLASH_ADDR) {
>          s->regs[addr] = DMA_FLASH_ADDR(s, value);
> -    } else if (s->ctrl->has_dma && addr == R_DMA_LEN) {
> +    } else if (aspeed_smc_has_dma(s) && addr == R_DMA_LEN) {
>          s->regs[addr] = DMA_LENGTH(value);
>      } else {
>          qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\n",
> @@ -1412,7 +1418,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
>      }
>
>      /* DMA support */
> -    if (s->ctrl->has_dma) {
> +    if (aspeed_smc_has_dma(s)) {
>          aspeed_smc_dma_setup(s, errp);
>      }
>  }
> --
> 2.26.3
>


  reply	other threads:[~2021-04-09  6:58 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-07 17:16 [PATCH 00/24] aspeed: fixes and extensions Cédric Le Goater
2021-04-07 17:16 ` [PATCH 01/24] aspeed/smc: Use the RAM memory region for DMAs Cédric Le Goater
2021-04-07 17:32   ` Philippe Mathieu-Daudé
2021-04-07 17:16 ` [PATCH 02/24] aspeed/smc: Remove unused "sdram-base" property Cédric Le Goater
2021-04-07 17:32   ` Philippe Mathieu-Daudé
2021-04-07 17:16 ` [PATCH 03/24] aspeed/i2c: Fix DMA address mask Cédric Le Goater
2021-04-07 21:22   ` Philippe Mathieu-Daudé
2021-04-08  8:58     ` Cédric Le Goater
2021-04-07 17:16 ` [PATCH 04/24] aspeed/i2c: Rename DMA address space Cédric Le Goater
2021-04-07 17:33   ` Philippe Mathieu-Daudé
2021-04-07 17:16 ` [PATCH 05/24] hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias Cédric Le Goater
2021-04-07 17:16 ` [PATCH 06/24] hw: Model ASPEED's Hash and Crypto Engine Cédric Le Goater
2021-04-07 19:31   ` Klaus Heinrich Kiwi
2021-04-07 17:16 ` [PATCH 07/24] aspeed: Integrate HACE Cédric Le Goater
2021-04-07 19:22   ` Klaus Heinrich Kiwi
2021-04-07 17:16 ` [PATCH 08/24] tests/qtest: Add test for Aspeed HACE Cédric Le Goater
2021-04-07 19:33   ` Klaus Heinrich Kiwi
2021-04-07 17:16 ` [PATCH 09/24] aspeed: Add Scater-Gather support for HACE Hash Cédric Le Goater
2021-04-08 12:39   ` Joel Stanley
2021-04-07 17:16 ` [PATCH 10/24] tests: Aspeed HACE Scatter-Gather tests Cédric Le Goater
2021-04-07 17:16 ` [PATCH 11/24] tests/acceptance: Test ast2400 and ast2500 machines Cédric Le Goater
2021-04-07 18:40   ` Willian Rampazzo
2021-04-07 17:16 ` [PATCH 12/24] tests/acceptance: Test ast2600 machine Cédric Le Goater
2021-04-07 18:36   ` Willian Rampazzo
2021-04-07 17:16 ` [PATCH 13/24] hw/misc/aspeed_xdma: Add AST2600 support Cédric Le Goater
2021-04-07 20:29   ` Eddie James
2021-04-07 17:16 ` [PATCH 14/24] aspeed/smc: Add a 'features' attribute to the object class Cédric Le Goater
2021-04-09  6:55   ` Joel Stanley [this message]
2021-04-07 17:16 ` [PATCH 15/24] aspeed/smc: Add extra controls to request DMA Cédric Le Goater
2021-04-09  6:54   ` Joel Stanley
2021-04-10  7:08     ` Cédric Le Goater
2021-04-07 17:16 ` [PATCH 16/24] tests/qtest: Rename m25p80 test in aspeed_smc test Cédric Le Goater
2021-04-09  6:55   ` Joel Stanley
2021-04-07 17:16 ` [PATCH 17/24] aspeed: Remove swift-bmc machine Cédric Le Goater
2021-04-07 18:13   ` Adriana Kobylak
2021-04-07 18:29   ` Peter Maydell
2021-04-08  7:40     ` Cédric Le Goater
2021-04-08  9:05       ` Peter Maydell
2021-04-07 17:16 ` [PATCH 18/24] aspeed: Add support for the rainier-bmc board Cédric Le Goater
2021-04-09  6:57   ` Joel Stanley
2021-04-07 17:16 ` [PATCH 19/24] hw/misc: Add an iBT device model Cédric Le Goater
2021-04-07 17:16 ` [PATCH 20/24] aspeed: Emulate the AST2600A3 Cédric Le Goater
2021-04-07 17:16 ` [PATCH 21/24] hw/block: m25p80: Add support for mt25qu02g Cédric Le Goater
2021-04-07 17:36   ` Alistair Francis
2021-04-08  8:00   ` Francisco Iglesias
2021-04-08  8:40     ` Cédric Le Goater
2021-04-08  9:21       ` Francisco Iglesias
2021-04-07 17:16 ` [PATCH 22/24] hw/misc: Add Infineon DPS310 sensor model Cédric Le Goater
2021-04-07 17:16 ` [PATCH 23/24] arm/aspeed: Add DPS310 to rainier Cédric Le Goater
2021-04-07 17:16 ` [PATCH 24/24] arm/aspeed: Add DPS310 to witherspoon Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CACPK8Xe759bbuEHybMnHyN2JsszAp41b=yq-cpnM8PnQU-N-uQ@mail.gmail.com' \
    --to=joel@jms.id.au \
    --cc=andrew@aj.id.au \
    --cc=clg@kaod.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).