From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH 13/19] target/arm: Move VLLDM and VLSTM to vfp.decode
Date: Thu, 20 Feb 2020 17:02:55 +0000 [thread overview]
Message-ID: <CAFEAcA_YZt26sZhfRtUpOjZYpfCT3r0qQe9q_sAk_4f8y1Tdpw@mail.gmail.com> (raw)
In-Reply-To: <20200214181547.21408-14-richard.henderson@linaro.org>
On Fri, 14 Feb 2020 at 18:16, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Now that we no longer have an early check for ARM_FEATURE_VFP,
> we can use the proper ISA check in trans_VLLDM_VLSTM.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/vfp.decode | 2 ++
> target/arm/translate-vfp.inc.c | 35 ++++++++++++++++++++++
> target/arm/translate.c | 53 ++++++----------------------------
> 3 files changed, 46 insertions(+), 44 deletions(-)
>
> diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode
> index a67b3f29ee..592fe9e1e4 100644
> --- a/target/arm/vfp.decode
> +++ b/target/arm/vfp.decode
> @@ -242,3 +242,5 @@ VCVT_sp_int ---- 1110 1.11 110 s:1 .... 1010 rz:1 1.0 .... \
> vd=%vd_sp vm=%vm_sp
> VCVT_dp_int ---- 1110 1.11 110 s:1 .... 1011 rz:1 1.0 .... \
> vd=%vd_sp vm=%vm_dp
> +
> +VLLDM_VLSTM 1110 1100 001 l:1 rn:4 0000 1010 0000 0000
> diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c
> index f6f7601fe2..8f2b97e0e7 100644
> --- a/target/arm/translate-vfp.inc.c
> +++ b/target/arm/translate-vfp.inc.c
> @@ -2816,3 +2816,38 @@ static bool trans_VCVT_dp_int(DisasContext *s, arg_VCVT_dp_int *a)
> tcg_temp_free_ptr(fpst);
> return true;
> }
> +
> +/*
> + * Decode VLLDM of VLSTM are nonstandard because:
"Decode of VLLDM and VLSTM"
> + * * if there is no FPU then these insns must NOP in
> + * Secure state and UNDEF in Nonsecure state
> + * * if there is an FPU then these insns do not have
> + * the usual behaviour that disas_vfp_insn() provides of
> + * being controlled by CPACR/NSACR enable bits or the
> + * lazy-stacking logic.
s/disas_vfp_insn/vfp_access_check/ (we never updated this
old comment when we moved the logic as part of the decodetree
conversion).
> + */
> +static bool trans_VLLDM_VLSTM(DisasContext *s, arg_VLLDM_VLSTM *a)
> +{
> + TCGv_i32 fptr;
> +
> + if (!arm_dc_feature(s, ARM_FEATURE_M) ||
> + !arm_dc_feature(s, ARM_FEATURE_V8)) {
> + return false;
> + }
> + if (!dc_isar_feature(aa32_fpsp_v2, s)) {
> + /* No FPU: NOP if secure, otherwise UNDEF. */
> + return s->v8m_secure;
> + }
We need to UNDEF if !v8m_secure even if there is an FPU.
> +
> + fptr = load_reg(s, a->rn);
> + if (a->l) {
> + gen_helper_v7m_vlldm(cpu_env, fptr);
> + } else {
> + gen_helper_v7m_vlstm(cpu_env, fptr);
> + }
> + tcg_temp_free_i32(fptr);
> +
> + /* End the TB, because we have updated FP control bits */
> + s->base.is_jmp = DISAS_UPDATE;
> + return true;
> +}
thanks
-- PMM
next prev parent reply other threads:[~2020-02-20 17:05 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-14 18:15 [PATCH 00/19] target/arm: vfp feature and decodetree cleanup Richard Henderson
2020-02-14 18:15 ` [PATCH 01/19] target/arm: Fix field extract from MVFR[0-2] Richard Henderson
2020-02-14 18:29 ` Philippe Mathieu-Daudé
2020-02-14 18:35 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 02/19] target/arm: Rename isar_feature_aa32_simd_r32 Richard Henderson
2020-02-14 18:50 ` Philippe Mathieu-Daudé
2020-02-21 15:58 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 03/19] target/arm: Use isar_feature_aa32_simd_r32 more places Richard Henderson
2020-02-21 16:02 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 04/19] target/arm: Set MVFR0.FPSP for ARMv5 cpus Richard Henderson
2020-02-21 16:02 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 05/19] target/arm: Add isar_feature_aa32_simd_r16 Richard Henderson
2020-02-21 16:01 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 06/19] target/arm: Rename isar_feature_aa32_fpdp_v2 Richard Henderson
2020-02-14 18:51 ` Philippe Mathieu-Daudé
2020-02-14 18:15 ` [PATCH 07/19] target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3} Richard Henderson
2020-02-21 16:03 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 08/19] target/arm: Perform fpdp_v2 check first Richard Henderson
2020-02-21 16:04 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 09/19] target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3 Richard Henderson
2020-02-21 16:05 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 10/19] target/arm: Add missing checks for fpsp_v2 Richard Henderson
2020-02-21 16:05 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 11/19] target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac Richard Henderson
2020-02-20 16:37 ` Peter Maydell
2020-02-20 16:41 ` Peter Maydell
2020-02-20 17:55 ` Richard Henderson
2020-02-14 18:15 ` [PATCH 12/19] target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn Richard Henderson
2020-02-20 17:19 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 13/19] target/arm: Move VLLDM and VLSTM to vfp.decode Richard Henderson
2020-02-20 17:02 ` Peter Maydell [this message]
2020-02-14 18:15 ` [PATCH 14/19] target/arm: Move the vfp decodetree calls next to the base isa Richard Henderson
2020-02-20 17:16 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 15/19] linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAP Richard Henderson
2020-02-20 17:32 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 16/19] target/arm: Remove ARM_FEATURE_VFP* Richard Henderson
2020-02-20 17:33 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 17/19] target/arm: Add formats for some vfp 2 and 3-register insns Richard Henderson
2020-02-20 17:40 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 18/19] target/arm: Split VFM decode Richard Henderson
2020-02-20 17:45 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 19/19] target/arm: Split VMINMAXNM decode Richard Henderson
2020-02-20 17:49 ` Peter Maydell
2020-02-14 20:11 ` [PATCH 00/19] target/arm: vfp feature and decodetree cleanup no-reply
2020-02-20 17:52 ` Peter Maydell
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