From: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>,
qemu-devel@nongnu.org
Cc: Aleksandar Markovic <amarkovic@wavecomp.com>
Subject: Re: [PATCH v7 12/14] target/mips: msa: Split helpers for ASUB_<S|U>.<B|H|W|D>
Date: Fri, 25 Oct 2019 18:01:25 +0200 [thread overview]
Message-ID: <a96de4ab-b705-2c08-b85c-fe5424392ce4@rt-rk.com> (raw)
In-Reply-To: <1571826227-10583-13-git-send-email-aleksandar.markovic@rt-rk.com>
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
>
> Achieves clearer code and slightly better performance.
>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
> target/mips/helper.h | 12 +++-
> target/mips/msa_helper.c | 169
++++++++++++++++++++++++++++++++++++++++++-----
> target/mips/translate.c | 38 +++++++++--
> 3 files changed, 193 insertions(+), 26 deletions(-)
>
> diff --git a/target/mips/helper.h b/target/mips/helper.h
> index d7c4bbf..7b8ad74 100644
> --- a/target/mips/helper.h
> +++ b/target/mips/helper.h
> @@ -945,6 +945,16 @@ DEF_HELPER_4(msa_mod_s_h, void, env, i32, i32, i32)
> DEF_HELPER_4(msa_mod_s_w, void, env, i32, i32, i32)
> DEF_HELPER_4(msa_mod_s_d, void, env, i32, i32, i32)
>
> +DEF_HELPER_4(msa_asub_s_b, void, env, i32, i32, i32)
> +DEF_HELPER_4(msa_asub_s_h, void, env, i32, i32, i32)
> +DEF_HELPER_4(msa_asub_s_w, void, env, i32, i32, i32)
> +DEF_HELPER_4(msa_asub_s_d, void, env, i32, i32, i32)
> +
> +DEF_HELPER_4(msa_asub_u_b, void, env, i32, i32, i32)
> +DEF_HELPER_4(msa_asub_u_h, void, env, i32, i32, i32)
> +DEF_HELPER_4(msa_asub_u_w, void, env, i32, i32, i32)
> +DEF_HELPER_4(msa_asub_u_d, void, env, i32, i32, i32)
> +
> DEF_HELPER_4(msa_hsub_s_h, void, env, i32, i32, i32)
> DEF_HELPER_4(msa_hsub_s_w, void, env, i32, i32, i32)
> DEF_HELPER_4(msa_hsub_s_d, void, env, i32, i32, i32)
> @@ -1053,8 +1063,6 @@ DEF_HELPER_5(msa_subs_s_df, void, env, i32,
i32, i32, i32)
> DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32)
> DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32)
> DEF_HELPER_5(msa_subsuu_s_df, void, env, i32, i32, i32, i32)
> -DEF_HELPER_5(msa_asub_s_df, void, env, i32, i32, i32, i32)
> -DEF_HELPER_5(msa_asub_u_df, void, env, i32, i32, i32, i32)
> DEF_HELPER_5(msa_mulv_df, void, env, i32, i32, i32, i32)
> DEF_HELPER_5(msa_maddv_df, void, env, i32, i32, i32, i32)
> DEF_HELPER_5(msa_msubv_df, void, env, i32, i32, i32, i32)
> diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
> index ae9e8e0..0e39016 100644
> --- a/target/mips/msa_helper.c
> +++ b/target/mips/msa_helper.c
> @@ -2888,6 +2888,157 @@ void helper_msa_mod_u_d(CPUMIPSState *env,
> *
+---------------+----------------------------------------------------------+
> */
>
> +
> +static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1,
int64_t arg2)
> +{
> + /* signed compare */
> + return (arg1 < arg2) ?
> + (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
> +}
> +
> +void helper_msa_asub_s_b(CPUMIPSState *env,
> + uint32_t wd, uint32_t ws, uint32_t wt)
> +{
> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> + wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
> +
> + pwd->b[0] = msa_asub_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
> + pwd->b[1] = msa_asub_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
> + pwd->b[2] = msa_asub_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
> + pwd->b[3] = msa_asub_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
> + pwd->b[4] = msa_asub_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
> + pwd->b[5] = msa_asub_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
> + pwd->b[6] = msa_asub_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
> + pwd->b[7] = msa_asub_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
> + pwd->b[8] = msa_asub_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
> + pwd->b[9] = msa_asub_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
> + pwd->b[10] = msa_asub_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
> + pwd->b[11] = msa_asub_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
> + pwd->b[12] = msa_asub_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
> + pwd->b[13] = msa_asub_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
> + pwd->b[14] = msa_asub_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
> + pwd->b[15] = msa_asub_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
> +}
> +
> +void helper_msa_asub_s_h(CPUMIPSState *env,
> + uint32_t wd, uint32_t ws, uint32_t wt)
> +{
> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> + wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
> +
> + pwd->h[0] = msa_asub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
> + pwd->h[1] = msa_asub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
> + pwd->h[2] = msa_asub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
> + pwd->h[3] = msa_asub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
> + pwd->h[4] = msa_asub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
> + pwd->h[5] = msa_asub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
> + pwd->h[6] = msa_asub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
> + pwd->h[7] = msa_asub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
> +}
> +
> +void helper_msa_asub_s_w(CPUMIPSState *env,
> + uint32_t wd, uint32_t ws, uint32_t wt)
> +{
> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> + wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
> +
> + pwd->w[0] = msa_asub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
> + pwd->w[1] = msa_asub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
> + pwd->w[2] = msa_asub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
> + pwd->w[3] = msa_asub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
> +}
> +
> +void helper_msa_asub_s_d(CPUMIPSState *env,
> + uint32_t wd, uint32_t ws, uint32_t wt)
> +{
> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> + wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
> +
> + pwd->d[0] = msa_asub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
> + pwd->d[1] = msa_asub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
> +}
> +
> +
> +static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1,
uint64_t arg2)
> +{
> + uint64_t u_arg1 = UNSIGNED(arg1, df);
> + uint64_t u_arg2 = UNSIGNED(arg2, df);
> + /* unsigned compare */
> + return (u_arg1 < u_arg2) ?
> + (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
> +}
> +
> +void helper_msa_asub_u_b(CPUMIPSState *env,
> + uint32_t wd, uint32_t ws, uint32_t wt)
> +{
> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> + wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
> +
> + pwd->b[0] = msa_asub_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
> + pwd->b[1] = msa_asub_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
> + pwd->b[2] = msa_asub_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
> + pwd->b[3] = msa_asub_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
> + pwd->b[4] = msa_asub_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
> + pwd->b[5] = msa_asub_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
> + pwd->b[6] = msa_asub_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
> + pwd->b[7] = msa_asub_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
> + pwd->b[8] = msa_asub_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
> + pwd->b[9] = msa_asub_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
> + pwd->b[10] = msa_asub_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
> + pwd->b[11] = msa_asub_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
> + pwd->b[12] = msa_asub_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
> + pwd->b[13] = msa_asub_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
> + pwd->b[14] = msa_asub_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
> + pwd->b[15] = msa_asub_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
> +}
> +
> +void helper_msa_asub_u_h(CPUMIPSState *env,
> + uint32_t wd, uint32_t ws, uint32_t wt)
> +{
> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> + wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
> +
> + pwd->h[0] = msa_asub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
> + pwd->h[1] = msa_asub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
> + pwd->h[2] = msa_asub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
> + pwd->h[3] = msa_asub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
> + pwd->h[4] = msa_asub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
> + pwd->h[5] = msa_asub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
> + pwd->h[6] = msa_asub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
> + pwd->h[7] = msa_asub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
> +}
> +
> +void helper_msa_asub_u_w(CPUMIPSState *env,
> + uint32_t wd, uint32_t ws, uint32_t wt)
> +{
> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> + wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
> +
> + pwd->w[0] = msa_asub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
> + pwd->w[1] = msa_asub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
> + pwd->w[2] = msa_asub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
> + pwd->w[3] = msa_asub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
> +}
> +
> +void helper_msa_asub_u_d(CPUMIPSState *env,
> + uint32_t wd, uint32_t ws, uint32_t wt)
> +{
> + wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
> + wr_t *pws = &(env->active_fpu.fpr[ws].wr);
> + wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
> +
> + pwd->d[0] = msa_asub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
> + pwd->d[1] = msa_asub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
> +}
> +
> +
> /* TODO: insert the rest of Int Subtract group helpers here */
>
>
> @@ -4447,22 +4598,6 @@ static inline int64_t msa_subsuu_s_df(uint32_t
df, int64_t arg1, int64_t arg2)
> }
> }
>
> -static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1,
int64_t arg2)
> -{
> - /* signed compare */
> - return (arg1 < arg2) ?
> - (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
> -}
> -
> -static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1,
uint64_t arg2)
> -{
> - uint64_t u_arg1 = UNSIGNED(arg1, df);
> - uint64_t u_arg2 = UNSIGNED(arg2, df);
> - /* unsigned compare */
> - return (u_arg1 < u_arg2) ?
> - (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
> -}
> -
> static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t
arg2)
> {
> return arg1 * arg2;
> @@ -4624,8 +4759,6 @@ MSA_BINOP_DF(subs_s)
> MSA_BINOP_DF(subs_u)
> MSA_BINOP_DF(subsus_u)
> MSA_BINOP_DF(subsuu_s)
> -MSA_BINOP_DF(asub_s)
> -MSA_BINOP_DF(asub_u)
> MSA_BINOP_DF(mulv)
> MSA_BINOP_DF(dotp_s)
> MSA_BINOP_DF(dotp_u)
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 4c68c5b..20c69d2 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -28850,6 +28850,38 @@ static void gen_msa_3r(CPUMIPSState *env,
DisasContext *ctx)
> break;
> }
> break;
> + case OPC_ASUB_S_df:
> + switch (df) {
> + case DF_BYTE:
> + gen_helper_msa_asub_s_b(cpu_env, twd, tws, twt);
> + break;
> + case DF_HALF:
> + gen_helper_msa_asub_s_h(cpu_env, twd, tws, twt);
> + break;
> + case DF_WORD:
> + gen_helper_msa_asub_s_w(cpu_env, twd, tws, twt);
> + break;
> + case DF_DOUBLE:
> + gen_helper_msa_asub_s_d(cpu_env, twd, tws, twt);
> + break;
> + }
> + break;
> + case OPC_ASUB_U_df:
> + switch (df) {
> + case DF_BYTE:
> + gen_helper_msa_asub_u_b(cpu_env, twd, tws, twt);
> + break;
> + case DF_HALF:
> + gen_helper_msa_asub_u_h(cpu_env, twd, tws, twt);
> + break;
> + case DF_WORD:
> + gen_helper_msa_asub_u_w(cpu_env, twd, tws, twt);
> + break;
> + case DF_DOUBLE:
> + gen_helper_msa_asub_u_d(cpu_env, twd, tws, twt);
> + break;
> + }
> + break;
> case OPC_ILVEV_df:
> switch (df) {
> case DF_BYTE:
> @@ -29059,12 +29091,6 @@ static void gen_msa_3r(CPUMIPSState *env,
DisasContext *ctx)
> case OPC_SUBSUU_S_df:
> gen_helper_msa_subsuu_s_df(cpu_env, tdf, twd, tws, twt);
> break;
> - case OPC_ASUB_S_df:
> - gen_helper_msa_asub_s_df(cpu_env, tdf, twd, tws, twt);
> - break;
> - case OPC_ASUB_U_df:
> - gen_helper_msa_asub_u_df(cpu_env, tdf, twd, tws, twt);
> - break;
>
> case OPC_DOTP_S_df:
> case OPC_DOTP_U_df:
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
next prev parent reply other threads:[~2019-10-25 16:11 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-23 10:23 [PATCH v7 00/14] target/mips: Misc cleanups for September/October 2019 Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 01/14] target/mips: Clean up helper.c Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 02/14] target/mips: Clean up op_helper.c Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 03/14] MAINTAINERS: Update mail address of Aleksandar Rikalo Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 04/14] target/mips: msa: Split helpers for <MAX|MIN>_A.<B|H|W|D> Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 05/14] target/mips: msa: Split helpers for <MAX|MIN>_<S|U>.<B|H|W|D> Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 06/14] target/mips: msa: Split helpers for ILV<EV|OD|L|R>.<B|H|W|D> Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 07/14] target/mips: msa: Split helpers for ADD<_A|S_A|S_S|S_U|V>.<B|H|W|D> Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 08/14] target/mips: msa: Split helpers for HADD_<S|U>.<H|W|D> Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 09/14] target/mips: msa: Split helpers for S<LL|RA|RAR|RL|RLR>.<B|H|W|D> Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 10/14] target/mips: msa: Split helpers for PCK<EV|OD>.<B|H|W|D> Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 11/14] target/mips: msa: Split helpers for HSUB_<S|U>.<H|W|D> Aleksandar Markovic
2019-10-25 16:00 ` Aleksandar Rikalo
2019-10-23 10:23 ` [PATCH v7 12/14] target/mips: msa: Split helpers for ASUB_<S|U>.<B|H|W|D> Aleksandar Markovic
2019-10-25 16:01 ` Aleksandar Rikalo [this message]
2019-10-23 10:23 ` [PATCH v7 13/14] target/mips: Add support for emulation of CRC32 group of instructions Aleksandar Markovic
2019-10-23 10:23 ` [PATCH v7 14/14] target/mips: Demacro LMI decoder Aleksandar Markovic
2019-10-25 16:02 ` Aleksandar Rikalo
2019-10-23 21:22 ` [PATCH v7 00/14] target/mips: Misc cleanups for September/October 2019 no-reply
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