From: Alistair Francis <alistair.francis@wdc.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: alistair23@gmail.com, palmer@sifive.com, alistair.francis@wdc.com
Subject: [Qemu-devel] [PATCH v1 3/4] disas/riscv: Fix `rdinstreth` constraint
Date: Fri, 17 May 2019 15:11:04 -0700 [thread overview]
Message-ID: <d4664adffe008df43f2a0760dd4e2b9cb834b652.1558131003.git.alistair.francis@wdc.com> (raw)
In-Reply-To: <cover.1558131003.git.alistair.francis@wdc.com>
From: Michael Clark <mjc@sifive.com>
The constraint for `rdinstreth` was comparing the csr number to 0xc80,
which is `cycleh` instead. Fix this.
Author: Wladimir J. van der Laan <laanwj@gmail.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
disas/riscv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index 3ab4586f0a..c2578a3c4b 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -614,7 +614,7 @@ static const rvc_constraint rvcc_rdtime[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc01, r
static const rvc_constraint rvcc_rdinstret[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc02, rvc_end };
static const rvc_constraint rvcc_rdcycleh[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc80, rvc_end };
static const rvc_constraint rvcc_rdtimeh[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc81, rvc_end };
-static const rvc_constraint rvcc_rdinstreth[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc80, rvc_end };
+static const rvc_constraint rvcc_rdinstreth[] = { rvc_rs1_eq_x0, rvc_csr_eq_0xc82, rvc_end };
static const rvc_constraint rvcc_frcsr[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x003, rvc_end };
static const rvc_constraint rvcc_frrm[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x002, rvc_end };
static const rvc_constraint rvcc_frflags[] = { rvc_rs1_eq_x0, rvc_csr_eq_0x001, rvc_end };
--
2.21.0
next prev parent reply other threads:[~2019-05-17 22:14 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-17 22:10 [Qemu-devel] [PATCH v1 0/4] Miscellaneous patches from the RISC-V fork Alistair Francis
2019-05-17 22:10 ` [Qemu-devel] [PATCH v1 1/4] target/riscv: Fix PMP range boundary address bug Alistair Francis
2019-05-17 22:11 ` [Qemu-devel] [PATCH v1 2/4] disas/riscv: Disassemble reserved compressed encodings as illegal Alistair Francis
2019-06-14 9:18 ` Palmer Dabbelt
2019-06-19 20:26 ` Alistair Francis
2019-05-17 22:11 ` Alistair Francis [this message]
2019-06-14 9:41 ` [Qemu-devel] [PATCH v1 3/4] disas/riscv: Fix `rdinstreth` constraint Palmer Dabbelt
2019-06-17 17:05 ` Alistair Francis
2019-05-17 22:11 ` [Qemu-devel] [PATCH v1 4/4] target/riscv: Implement riscv_cpu_unassigned_access Alistair Francis
2019-06-14 9:41 ` Palmer Dabbelt
2019-06-06 18:41 ` [Qemu-devel] [PATCH v1 0/4] Miscellaneous patches from the RISC-V fork Alistair Francis
2019-06-14 9:46 ` Palmer Dabbelt
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