* [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers
@ 2021-03-16 13:43 Vladimir Murzin
2021-03-16 13:52 ` Marc Zyngier
2021-03-17 13:26 ` Will Deacon
0 siblings, 2 replies; 5+ messages in thread
From: Vladimir Murzin @ 2021-03-16 13:43 UTC (permalink / raw)
To: linux-arm-kernel, stable; +Cc: catalin.marinas, will, maz, dbrazdil
Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
reorganized el2 setup in such way that virtual cpu id registers set
only in nVHE, yet they used (and need) to be set irrespective VHE
support.
Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
---
Changelog
v1 -> v2
- Drop the reference to 32bit guests from commit message (per Marc)
There is no upstream fix since issue went away due to code there has
been reworked in 5.12: nVHE comes first, so virtual cpu id register
are always set.
Maintainers, please, Ack.
arch/arm64/include/asm/el2_setup.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index f988e94cdf9e..db87daca6b8c 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -113,7 +113,7 @@
.endm
/* Virtual CPU ID registers */
-.macro __init_el2_nvhe_idregs
+.macro __init_el2_idregs
mrs x0, midr_el1
mrs x1, mpidr_el1
msr vpidr_el2, x0
@@ -165,6 +165,7 @@
__init_el2_stage2
__init_el2_gicv3
__init_el2_hstr
+ __init_el2_idregs
/*
* When VHE is not in use, early init of EL2 needs to be done here.
@@ -173,7 +174,6 @@
* will be done via the _EL1 system register aliases in __cpu_setup.
*/
.ifeqs "\mode", "nvhe"
- __init_el2_nvhe_idregs
__init_el2_nvhe_cptr
__init_el2_nvhe_sve
__init_el2_nvhe_prepare_eret
--
2.24.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers
2021-03-16 13:43 [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers Vladimir Murzin
@ 2021-03-16 13:52 ` Marc Zyngier
2021-03-17 13:26 ` Will Deacon
1 sibling, 0 replies; 5+ messages in thread
From: Marc Zyngier @ 2021-03-16 13:52 UTC (permalink / raw)
To: Vladimir Murzin; +Cc: linux-arm-kernel, stable, catalin.marinas, will, dbrazdil
On Tue, 16 Mar 2021 13:43:19 +0000,
Vladimir Murzin <vladimir.murzin@arm.com> wrote:
>
> Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
> reorganized el2 setup in such way that virtual cpu id registers set
> only in nVHE, yet they used (and need) to be set irrespective VHE
> support.
>
> Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers
2021-03-16 13:43 [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers Vladimir Murzin
2021-03-16 13:52 ` Marc Zyngier
@ 2021-03-17 13:26 ` Will Deacon
2021-03-18 12:57 ` Sasha Levin
1 sibling, 1 reply; 5+ messages in thread
From: Will Deacon @ 2021-03-17 13:26 UTC (permalink / raw)
To: Vladimir Murzin; +Cc: linux-arm-kernel, stable, catalin.marinas, maz, dbrazdil
On Tue, Mar 16, 2021 at 01:43:19PM +0000, Vladimir Murzin wrote:
> Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
> reorganized el2 setup in such way that virtual cpu id registers set
> only in nVHE, yet they used (and need) to be set irrespective VHE
> support.
>
> Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> ---
> Changelog
>
> v1 -> v2
> - Drop the reference to 32bit guests from commit message (per Marc)
>
> There is no upstream fix since issue went away due to code there has
> been reworked in 5.12: nVHE comes first, so virtual cpu id register
> are always set.
>
> Maintainers, please, Ack.
>
> arch/arm64/include/asm/el2_setup.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Will Deacon <will@kernel.org>
It's a bit weird to have a patch in stable that isn't upstream, but I don't
see a better option here.
Will
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers
2021-03-17 13:26 ` Will Deacon
@ 2021-03-18 12:57 ` Sasha Levin
2021-03-19 9:45 ` Greg KH
0 siblings, 1 reply; 5+ messages in thread
From: Sasha Levin @ 2021-03-18 12:57 UTC (permalink / raw)
To: Will Deacon
Cc: Vladimir Murzin, linux-arm-kernel, stable, catalin.marinas, maz,
dbrazdil
On Wed, Mar 17, 2021 at 01:26:15PM +0000, Will Deacon wrote:
>On Tue, Mar 16, 2021 at 01:43:19PM +0000, Vladimir Murzin wrote:
>> Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
>> reorganized el2 setup in such way that virtual cpu id registers set
>> only in nVHE, yet they used (and need) to be set irrespective VHE
>> support.
>>
>> Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
>> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
>> ---
>> Changelog
>>
>> v1 -> v2
>> - Drop the reference to 32bit guests from commit message (per Marc)
>>
>> There is no upstream fix since issue went away due to code there has
>> been reworked in 5.12: nVHE comes first, so virtual cpu id register
>> are always set.
>>
>> Maintainers, please, Ack.
>>
>> arch/arm64/include/asm/el2_setup.h | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>Acked-by: Will Deacon <will@kernel.org>
>
>It's a bit weird to have a patch in stable that isn't upstream, but I don't
>see a better option here.
Yes, I'd agree here - the commits that would need to be backported look
way too invasive.
I've queued it up, thanks.
--
Thanks,
Sasha
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers
2021-03-18 12:57 ` Sasha Levin
@ 2021-03-19 9:45 ` Greg KH
0 siblings, 0 replies; 5+ messages in thread
From: Greg KH @ 2021-03-19 9:45 UTC (permalink / raw)
To: Sasha Levin
Cc: Will Deacon, Vladimir Murzin, linux-arm-kernel, stable,
catalin.marinas, maz, dbrazdil
On Thu, Mar 18, 2021 at 08:57:00AM -0400, Sasha Levin wrote:
> On Wed, Mar 17, 2021 at 01:26:15PM +0000, Will Deacon wrote:
> > On Tue, Mar 16, 2021 at 01:43:19PM +0000, Vladimir Murzin wrote:
> > > Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
> > > reorganized el2 setup in such way that virtual cpu id registers set
> > > only in nVHE, yet they used (and need) to be set irrespective VHE
> > > support.
> > >
> > > Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
> > > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
> > > ---
> > > Changelog
> > >
> > > v1 -> v2
> > > - Drop the reference to 32bit guests from commit message (per Marc)
> > >
> > > There is no upstream fix since issue went away due to code there has
> > > been reworked in 5.12: nVHE comes first, so virtual cpu id register
> > > are always set.
> > >
> > > Maintainers, please, Ack.
> > >
> > > arch/arm64/include/asm/el2_setup.h | 4 ++--
> > > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > Acked-by: Will Deacon <will@kernel.org>
> >
> > It's a bit weird to have a patch in stable that isn't upstream, but I don't
> > see a better option here.
>
> Yes, I'd agree here - the commits that would need to be backported look
> way too invasive.
>
> I've queued it up, thanks.
I don't see it, so I've added it as well...
thanks,
greg k-h
^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-03-16 13:43 [PATCH v2][for-stable-v5.11] arm64: Unconditionally set virtual cpu id registers Vladimir Murzin
2021-03-16 13:52 ` Marc Zyngier
2021-03-17 13:26 ` Will Deacon
2021-03-18 12:57 ` Sasha Levin
2021-03-19 9:45 ` Greg KH
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