From: Palmer Dabbelt <palmer@sifive.com>
To: mark.rutland@arm.com
Cc: linux-kernel@vger.kernel.org, peterz@infradead.org,
Will Deacon <will.deacon@arm.com>,
aou@eecs.berkeley.edu, Arnd Bergmann <arnd@arndb.de>,
bp@alien8.de, catalin.marinas@arm.com, davem@davemloft.net,
fenghua.yu@intel.com, heiko.carstens@de.ibm.com,
herbert@gondor.apana.org.au, ink@jurassic.park.msu.ru,
jhogan@kernel.org, linux@armlinux.org.uk, mark.rutland@arm.com,
mattst88@gmail.com, mingo@kernel.org, mpe@ellerman.id.au,
paul.burton@mips.com, paulus@samba.org, ralf@linux-mips.org,
rth@twiddle.net, stable@vger.kernel.org, tglx@linutronix.de,
tony.luck@intel.com, vgupta@synopsys.com
Subject: Re: [PATCH 12/18] locking/atomic: riscv: use s64 for atomic64
Date: Wed, 22 May 2019 12:06:31 -0700 (PDT) [thread overview]
Message-ID: <mhng-678bd8a3-987b-4564-9885-1a764d1725b8@palmer-si-x1e> (raw)
In-Reply-To: <20190522132250.26499-13-mark.rutland@arm.com>
On Wed, 22 May 2019 06:22:44 PDT (-0700), mark.rutland@arm.com wrote:
> As a step towards making the atomic64 API use consistent types treewide,
> let's have the s390 atomic64 implementation use s64 as the underlying
and apparently the RISC-V one as well? :)
> type for atomic64_t, rather than long, matching the generated headers.
>
> As atomic64_read() depends on the generic defintion of atomic64_t, this
> still returns long on 64-bit. This will be converted in a subsequent
> patch.
>
> Otherwise, there should be no functional change as a result of this patch.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Albert Ou <aou@eecs.berkeley.edu>
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Will Deacon <will.deacon@arm.com>
> ---
> arch/riscv/include/asm/atomic.h | 44 +++++++++++++++++++++--------------------
> 1 file changed, 23 insertions(+), 21 deletions(-)
>
> diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h
> index c9e18289d65c..bffebc57357d 100644
> --- a/arch/riscv/include/asm/atomic.h
> +++ b/arch/riscv/include/asm/atomic.h
> @@ -42,11 +42,11 @@ static __always_inline void atomic_set(atomic_t *v, int i)
>
> #ifndef CONFIG_GENERIC_ATOMIC64
> #define ATOMIC64_INIT(i) { (i) }
> -static __always_inline long atomic64_read(const atomic64_t *v)
> +static __always_inline s64 atomic64_read(const atomic64_t *v)
> {
> return READ_ONCE(v->counter);
> }
> -static __always_inline void atomic64_set(atomic64_t *v, long i)
> +static __always_inline void atomic64_set(atomic64_t *v, s64 i)
> {
> WRITE_ONCE(v->counter, i);
> }
> @@ -70,11 +70,11 @@ void atomic##prefix##_##op(c_type i, atomic##prefix##_t *v) \
>
> #ifdef CONFIG_GENERIC_ATOMIC64
> #define ATOMIC_OPS(op, asm_op, I) \
> - ATOMIC_OP (op, asm_op, I, w, int, )
> + ATOMIC_OP (op, asm_op, I, w, int, )
> #else
> #define ATOMIC_OPS(op, asm_op, I) \
> - ATOMIC_OP (op, asm_op, I, w, int, ) \
> - ATOMIC_OP (op, asm_op, I, d, long, 64)
> + ATOMIC_OP (op, asm_op, I, w, int, ) \
> + ATOMIC_OP (op, asm_op, I, d, s64, 64)
> #endif
>
> ATOMIC_OPS(add, add, i)
> @@ -131,14 +131,14 @@ c_type atomic##prefix##_##op##_return(c_type i, atomic##prefix##_t *v) \
>
> #ifdef CONFIG_GENERIC_ATOMIC64
> #define ATOMIC_OPS(op, asm_op, c_op, I) \
> - ATOMIC_FETCH_OP( op, asm_op, I, w, int, ) \
> - ATOMIC_OP_RETURN(op, asm_op, c_op, I, w, int, )
> + ATOMIC_FETCH_OP( op, asm_op, I, w, int, ) \
> + ATOMIC_OP_RETURN(op, asm_op, c_op, I, w, int, )
> #else
> #define ATOMIC_OPS(op, asm_op, c_op, I) \
> - ATOMIC_FETCH_OP( op, asm_op, I, w, int, ) \
> - ATOMIC_OP_RETURN(op, asm_op, c_op, I, w, int, ) \
> - ATOMIC_FETCH_OP( op, asm_op, I, d, long, 64) \
> - ATOMIC_OP_RETURN(op, asm_op, c_op, I, d, long, 64)
> + ATOMIC_FETCH_OP( op, asm_op, I, w, int, ) \
> + ATOMIC_OP_RETURN(op, asm_op, c_op, I, w, int, ) \
> + ATOMIC_FETCH_OP( op, asm_op, I, d, s64, 64) \
> + ATOMIC_OP_RETURN(op, asm_op, c_op, I, d, s64, 64)
> #endif
>
> ATOMIC_OPS(add, add, +, i)
> @@ -170,11 +170,11 @@ ATOMIC_OPS(sub, add, +, -i)
>
> #ifdef CONFIG_GENERIC_ATOMIC64
> #define ATOMIC_OPS(op, asm_op, I) \
> - ATOMIC_FETCH_OP(op, asm_op, I, w, int, )
> + ATOMIC_FETCH_OP(op, asm_op, I, w, int, )
> #else
> #define ATOMIC_OPS(op, asm_op, I) \
> - ATOMIC_FETCH_OP(op, asm_op, I, w, int, ) \
> - ATOMIC_FETCH_OP(op, asm_op, I, d, long, 64)
> + ATOMIC_FETCH_OP(op, asm_op, I, w, int, ) \
> + ATOMIC_FETCH_OP(op, asm_op, I, d, s64, 64)
> #endif
>
> ATOMIC_OPS(and, and, i)
> @@ -223,9 +223,10 @@ static __always_inline int atomic_fetch_add_unless(atomic_t *v, int a, int u)
> #define atomic_fetch_add_unless atomic_fetch_add_unless
>
> #ifndef CONFIG_GENERIC_ATOMIC64
> -static __always_inline long atomic64_fetch_add_unless(atomic64_t *v, long a, long u)
> +static __always_inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u)
> {
> - long prev, rc;
> + s64 prev;
> + long rc;
>
> __asm__ __volatile__ (
> "0: lr.d %[p], %[c]\n"
> @@ -294,11 +295,11 @@ c_t atomic##prefix##_cmpxchg(atomic##prefix##_t *v, c_t o, c_t n) \
>
> #ifdef CONFIG_GENERIC_ATOMIC64
> #define ATOMIC_OPS() \
> - ATOMIC_OP( int, , 4)
> + ATOMIC_OP(int, , 4)
> #else
> #define ATOMIC_OPS() \
> - ATOMIC_OP( int, , 4) \
> - ATOMIC_OP(long, 64, 8)
> + ATOMIC_OP(int, , 4) \
> + ATOMIC_OP(s64, 64, 8)
> #endif
>
> ATOMIC_OPS()
> @@ -336,9 +337,10 @@ static __always_inline int atomic_sub_if_positive(atomic_t *v, int offset)
> #define atomic_dec_if_positive(v) atomic_sub_if_positive(v, 1)
>
> #ifndef CONFIG_GENERIC_ATOMIC64
> -static __always_inline long atomic64_sub_if_positive(atomic64_t *v, long offset)
> +static __always_inline s64 atomic64_sub_if_positive(atomic64_t *v, s64 offset)
> {
> - long prev, rc;
> + s64 prev;
> + long rc;
>
> __asm__ __volatile__ (
> "0: lr.d %[p], %[c]\n"
Reviwed-by: Palmer Dabbelt <palmer@sifive.com>
Thanks!
next prev parent reply other threads:[~2019-05-22 19:06 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-22 13:22 [PATCH 00/18] locking/atomic: atomic64 type cleanup Mark Rutland
2019-05-22 13:22 ` [PATCH 01/18] locking/atomic: crypto: nx: prepare for atomic64_read() conversion Mark Rutland
2019-05-22 13:22 ` [PATCH 02/18] locking/atomic: s390/pci: " Mark Rutland
2019-05-22 13:22 ` [PATCH 03/18] locking/atomic: generic: use s64 for atomic64 Mark Rutland
2019-05-22 21:16 ` Arnd Bergmann
2019-05-22 13:22 ` [PATCH 04/18] locking/atomic: alpha: " Mark Rutland
2019-05-22 13:22 ` [PATCH 05/18] locking/atomic: arc: " Mark Rutland
2019-05-23 23:10 ` Vineet Gupta
2019-05-22 13:22 ` [PATCH 06/18] locking/atomic: arm: " Mark Rutland
2019-05-22 13:22 ` [PATCH 07/18] locking/atomic: arm64: " Mark Rutland
2019-05-22 13:22 ` [PATCH 08/18] locking/atomic: ia64: " Mark Rutland
2019-05-22 13:22 ` [PATCH 09/18] locking/atomic: mips: " Mark Rutland
2019-05-22 13:22 ` [PATCH 10/18] locking/atomic: powerpc: " Mark Rutland
2019-05-23 13:27 ` Michael Ellerman
2019-05-22 13:22 ` [PATCH 11/18] locking/atomic: riscv: fix atomic64_sub_if_positive() offset argument Mark Rutland
2019-05-22 19:06 ` Palmer Dabbelt
2019-05-22 13:22 ` [PATCH 12/18] locking/atomic: riscv: use s64 for atomic64 Mark Rutland
2019-05-22 19:06 ` Palmer Dabbelt [this message]
2019-05-23 10:23 ` Mark Rutland
2019-05-22 13:22 ` [PATCH 13/18] locking/atomic: s390: " Mark Rutland
2019-05-22 13:22 ` [PATCH 14/18] locking/atomic: sparc: " Mark Rutland
2019-05-22 13:22 ` [PATCH 15/18] locking/atomic: x86: " Mark Rutland
2019-05-22 13:22 ` [PATCH 16/18] locking/atomic: use s64 for atomic64_t on 64-bit Mark Rutland
2019-05-22 13:22 ` [PATCH 17/18] locking/atomic: crypto: nx: remove redundant casts Mark Rutland
2019-05-22 13:22 ` [PATCH 18/18] locking/atomic: s390/pci: " Mark Rutland
2019-05-22 21:18 ` [PATCH 00/18] locking/atomic: atomic64 type cleanup Arnd Bergmann
2019-05-23 10:28 ` Mark Rutland
2019-05-23 8:30 ` Andrea Parri
2019-05-23 10:19 ` Mark Rutland
2019-05-23 11:20 ` Andrea Parri
2019-05-24 10:37 ` Peter Zijlstra
2019-05-24 11:18 ` Peter Zijlstra
2019-05-24 11:38 ` Greg KH
2019-05-24 11:42 ` Will Deacon
2019-05-24 11:52 ` Peter Zijlstra
2019-05-24 22:43 ` Andrea Parri
2019-05-28 10:47 ` Peter Zijlstra
2019-05-28 11:15 ` Andrea Parri
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