Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems

From: Alan Cox <gnomes@lxorguk.ukuu.org.uk>
To: "Shaikh, Azhar" <azhar.shaikh@intel.com>
Cc: "jarkko.sakkinen@linux.intel.com"
	<jarkko.sakkinen@linux.intel.com>,
	"jgunthorpe@obsidianresearch.com"
	<jgunthorpe@obsidianresearch.com>,
	"tpmdd-devel@lists.sourceforge.net"
	<tpmdd-devel@lists.sourceforge.net>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-security-module@vger.kernel.org"
	<linux-security-module@vger.kernel.org>
Subject: Re: [PATCH v3] tpm: Enable CLKRUN protocol for Braswell systems
Date: Thu, 8 Jun 2017 19:22:59 +0100	[thread overview]
Message-ID: <20170608192259.43150ffa@lxorguk.ukuu.org.uk> (raw)
In-Reply-To: <5FFFAD06ADE1CA4381B3F0F7C6AF5828910C7B@ORSMSX109.amr.corp.intel.com>

> > > +	outb(0x80, 0xCC);
> > > +
> > > +	/* Make sure the above write is completed */
> > > +	wmb();  
> > 
> > Why the wmb(). It doesn't do what the comment says! Also this code is x86
> > specific
> > 
> >   
> 
> Memory barrier to enforce the order so that the outb() is completed, which ensures that the LPC clocks are running before sending any TPM command.

wmb() doesn't do that. It merely ensures that the write has been posted
to the fabric. If as I suspect your LPC bus implements outb() as a
non-posted write you don't need the wmb(). If it doesn't then you need to
issue whatever access is needed to the fabric to ensure the post
completed (eg for PCI if you do an MMIO write you must do an MMIO read
from the same devfn).

Secondly outb(0x80, 0xCC) doesn't write 0xCC to port 0x80. It writes 0x80
to port 0xCC !

Alan