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From: Yanhong Wang <yanhong.wang@starfivetech.com>
To: <u-boot@lists.denx.de>, Rick Chen <rick@andestech.com>,
	Leo <ycliang@andestech.com>,
	Joe Hershberger <joe.hershberger@ni.com>,
	"Ramon Fried" <rfried.dev@gmail.com>
Cc: Yanhong Wang <yanhong.wang@starfivetech.com>,
	Torsten Duwe <duwe@lst.de>,
	 Leyfoon Tan <leyfoon.tan@starfivetech.com>,
	"samin . guo" <samin.guo@starfivetech.com>,
	Walker Chen <walker.chen@starfivetech.com>
Subject: [PATCH v4 06/11] riscv: dts: jh7110: Add ethernet device tree nodes
Date: Thu, 25 May 2023 17:36:32 +0800	[thread overview]
Message-ID: <20230525093637.31364-7-yanhong.wang@starfivetech.com> (raw)
In-Reply-To: <20230525093637.31364-1-yanhong.wang@starfivetech.com>

Add ethernet device tree node to support StarFive ethernet driver for
the JH7110 RISC-V SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
---
 .../dts/jh7110-starfive-visionfive-2.dtsi     | 34 +++++++++
 arch/riscv/dts/jh7110.dtsi                    | 69 +++++++++++++++++++
 2 files changed, 103 insertions(+)

diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
index c6b6dfa940..0272369b24 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
@@ -17,6 +17,8 @@
 		i2c2 = &i2c2;
 		i2c5 = &i2c5;
 		i2c6 = &i2c6;
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
 	};
 
 	chosen {
@@ -317,3 +319,35 @@
 	assigned-clock-parents = <&osc>;
 	assigned-clock-rates = <0>;
 };
+
+&gmac0 {
+	phy-handle = <&phy0>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy0: ethernet-phy@0 {
+			reg = <0>;
+		};
+	};
+};
+
+&gmac1 {
+	phy-handle = <&phy1>;
+	phy-mode = "rgmii-id";
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,dwmac-mdio";
+
+		phy1: ethernet-phy@1 {
+			reg = <0>;
+		};
+	};
+};
\ No newline at end of file
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index bd60879615..58e332e9d7 100644
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -235,6 +235,13 @@
 		#clock-cells = <0>;
 	};
 
+	stmmac_axi_setup: stmmac-axi-config {
+		snps,lpi_en;
+		snps,wr_osr_lmt = <4>;
+		snps,rd_osr_lmt = <4>;
+		snps,blen = <256 128 64 32 0 0 0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;
@@ -539,6 +546,68 @@
 			status = "disabled";
 		};
 
+		gmac0: ethernet@16030000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16030000 0x0 0x10000>;
+			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <7>, <6>, <5>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			starfive,syscon = <&aon_syscon 0xc 0x12>;
+			status = "disabled";
+		};
+
+		gmac1: ethernet@16040000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16040000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSRST_GMAC1_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <78>, <77>, <76>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			starfive,syscon = <&sys_syscon 0x90 0x2>;
+			status = "disabled";
+		};
+
 		aoncrg: clock-controller@17000000 {
 			compatible = "starfive,jh7110-aoncrg";
 			reg = <0x0 0x17000000 0x0 0x10000>;
-- 
2.17.1


  parent reply	other threads:[~2023-05-25  9:38 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-25  9:36 [PATCH v4 00/11] Add ethernet driver for StarFive JH7110 SoC Yanhong Wang
2023-05-25  9:36 ` [PATCH v4 01/11] net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy Yanhong Wang
2023-05-25  9:36 ` [PATCH v4 02/11] net: dwc_eth_qos: Add StarFive ethernet driver glue layer Yanhong Wang
2023-05-25  9:36 ` [PATCH v4 03/11] eeprom: starfive: Enable ID EEPROM configuration Yanhong Wang
2023-05-25  9:36 ` [PATCH v4 04/11] ram: starfive: Read memory size information from EEPROM Yanhong Wang
2023-05-25  9:36 ` [PATCH v4 05/11] board: starfive: Dynamic configuration of DT for 1.2A and 1.3B Yanhong Wang
2023-05-25  9:36 ` Yanhong Wang [this message]
2023-05-25  9:36 ` [PATCH v4 07/11] riscv: dts: jh7110: Combine the board device tree files of " Yanhong Wang
2023-05-25  9:36 ` [PATCH v4 08/11] riscv: dts: starfive: Add support eeprom device tree node Yanhong Wang
2023-05-25  9:36 ` [PATCH v4 09/11] doc: board: starfive: Reword the make defconfig information Yanhong Wang
2023-05-25  9:36 ` [PATCH v4 10/11] configs: starfive: Enable ethernet configuration for StarFive VisionFive2 Yanhong Wang
2023-06-04 18:53   ` Jan Kiszka
2023-06-06  7:43     ` yanhong wang
2023-05-25  9:36 ` [PATCH v4 11/11] configs: starfive: Enable ID EEPROM configuration Yanhong Wang
2023-06-04 19:23   ` Jan Kiszka
2023-06-07  2:19     ` yanhong wang
2023-06-07 12:30       ` Jan Kiszka
2023-05-26  7:40 ` [PATCH v4 00/11] Add ethernet driver for StarFive JH7110 SoC Torsten Duwe
2023-06-01 17:44 ` Torsten Duwe
2023-06-02  3:14   ` yanhong wang

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