From: Sean Anderson <sean.anderson@seco.com>
To: Zhengxun <zhengxunli.mxic@gmail.com>,
u-boot@lists.denx.de, michal.simek@xilinx.com, lukma@denx.de
Cc: zhengxunli@mxic.com.tw
Subject: Re: [PATCH v6 2/2] dt-bindings: add xilinx clocking wizard bindings
Date: Fri, 11 Jun 2021 11:07:53 -0400 [thread overview]
Message-ID: <40fad673-536b-374c-af15-70616ffa6745@seco.com> (raw)
In-Reply-To: <20210611151049.13475-3-zhengxunli.mxic@gmail.com>
On 6/11/21 11:10 AM, Zhengxun wrote:
> Add the devicetree binding for the xilinx clocking wizard.
>
> Signed-off-by: Zhengxun <zhengxunli.mxic@gmail.com>
> ---
> .../clock/xlnx,clocking-wizard.txt | 43 +++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 doc/device-tree-bindings/clock/xlnx,clocking-wizard.txt
Should this be .yml? In general, I believe we only need to document
bindings in U-Boot if they differ from Linux. In Linux, I see that
Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.txt exists.
Will you be upstreaming this conversion to yaml?
--Sean
>
> diff --git a/doc/device-tree-bindings/clock/xlnx,clocking-wizard.txt b/doc/device-tree-bindings/clock/xlnx,clocking-wizard.txt
> new file mode 100644
> index 0000000000..e0e73ec723
> --- /dev/null
> +++ b/doc/device-tree-bindings/clock/xlnx,clocking-wizard.txt
> @@ -0,0 +1,43 @@
> +Xilinx clocking wizard bindings
> +
> +description:
> + The clocking wizard is a soft ip clocking block of Xilinx versal. It
> + reads required input clock frequencies from the devicetree and acts as
> + clock output.
> +
> +properties:
> + compatible:
> + const: xlnx,clocking-wizard
> +
> + reg:
> + maxItems: 1
> +
> + "#clock-cells":
> + const: 1
> +
> + clocks:
> + items:
> + - description: clock input
> +
> + clock-names:
> + items:
> + - const: clk_in1
> +
> +required:
> + - compatible
> + - reg
> + - "#clock-cells"
> + - clocks
> + - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + clkwizard@43c20000 {
> + compatible = "xlnx,clocking-wizard";
> + reg = <0x43c20000 0x10000>;
> + #clock-cells = <1>;
> + clock-names = "clk_in1";
> + clocks = <&clkc 18>;
> + };
>
next prev parent reply other threads:[~2021-06-11 15:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-11 15:10 [PATCH v6 0/2] Add Xilinx clock wizard driver support Zhengxun
2021-06-11 15:10 ` [PATCH v6 1/2] clk: zynq: Add clock wizard driver Zhengxun
2021-06-11 15:09 ` Sean Anderson
2021-06-16 10:01 ` Michal Simek
2021-06-11 15:10 ` [PATCH v6 2/2] dt-bindings: add xilinx clocking wizard bindings Zhengxun
2021-06-11 15:07 ` Sean Anderson [this message]
2021-06-15 17:21 ` Zhengxun Li
2021-06-15 14:52 ` Sean Anderson
2021-06-16 15:26 ` Zhengxun Li
2021-06-16 10:04 ` Michal Simek
2021-06-17 11:12 ` Zhengxun Li
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