From: Leo Liang <ycliang@andestech.com>
To: <trini@konsulko.com>
Cc: <u-boot@lists.denx.de>, <rick@andestech.com>
Subject: [PULL] u-boot-riscv/riscv-for-next
Date: Thu, 6 Jul 2023 10:45:51 +0000 [thread overview]
Message-ID: <ZKabX3HI7USoCEEt@ubuntu01> (raw)
Hi Tom,
The following changes since commit e80f4079b3a3db0961b73fa7a96e6c90242d8d25:
Merge tag 'v2023.07-rc6' into next (2023-07-05 11:28:55 -0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-riscv.git riscv-for-next
for you to fetch changes up to 12f66e2197c59e500d1e2ee359bb2ce22d748290:
board: ae350: Add missing env variables for booti (2023-07-06 17:28:08 +0800)
CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/16799
----------------------------------------------------------------
- RISC-V CI OpenSBI version update
- Andes ae350 board modification
- Sync PolarFire SoC dts with Linux
- Support building ubifs
----------------------------------------------------------------
Ben Dooks (4):
riscv: add generic link for <asm/atomic.h>
riscv: implement local_irq_{save,restore} macros
riscv: define test_and_{set,clear}_bit in asm/bitops.h
clk: sifive: only build sifive-prci.o for CONFIG_CLK_SIFIVE_PRCI
Bin Meng (1):
ci: riscv: Update OpenSBI to v1.2
Conor Dooley (3):
riscv: dts: drop microchip from dts filenames
riscv: dts: sync mpfs-icicle devicetree with linux
board: microchip: set mac address for ethernet1 on icicle
Heinrich Schuchardt (2):
cmd/sbi: display new extensions
RISC-V: CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS description
Hoegeun Kwon (1):
clk: starfive: pll: Fix to use postdiv1_mask
Yu Chien Peter Lin (2):
riscv: andes_plicsw: Fix IPI during OpenSBI invocation
board: ae350: Add missing env variables for booti
.azure-pipelines.yml | 8 +--
.gitlab-ci.yml | 8 +--
arch/riscv/dts/Makefile | 2 +-
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 136 -------------------------------------------
arch/riscv/dts/mpfs-icicle-kit-fabric.dtsi | 71 +++++++++++++++++++++++
arch/riscv/dts/{microchip-mpfs-icicle-kit-u-boot.dtsi => mpfs-icicle-kit-u-boot.dtsi} | 0
arch/riscv/dts/mpfs-icicle-kit.dts | 208 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
arch/riscv/dts/{microchip-mpfs.dtsi => mpfs.dtsi} | 434 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------------------------------------------------------------
arch/riscv/include/asm/atomic.h | 14 +++++
arch/riscv/include/asm/bitops.h | 3 +
arch/riscv/include/asm/sbi.h | 9 +++
arch/riscv/include/asm/system.h | 17 ++++--
arch/riscv/lib/andes_plicsw.c | 25 +++++++-
board/microchip/mpfs_icicle/mpfs_icicle.c | 15 ++++-
cmd/riscv/sbi.c | 3 +
common/spl/Kconfig | 6 +-
configs/microchip_mpfs_icicle_defconfig | 2 +-
doc/board/microchip/mpfs_icicle.rst | 6 +-
drivers/clk/sifive/Makefile | 4 +-
drivers/clk/starfive/clk-jh7110-pll.c | 2 +-
include/configs/ae350.h | 14 +++--
include/dt-bindings/clock/microchip-mpfs-clock.h | 29 +++++++++-
include/dt-bindings/interrupt-controller/microchip-mpfs-plic.h | 196 --------------------------------------------------------------
include/dt-bindings/interrupt-controller/riscv-hart.h | 17 ------
24 files changed, 597 insertions(+), 632 deletions(-)
delete mode 100644 arch/riscv/dts/microchip-mpfs-icicle-kit.dts
create mode 100644 arch/riscv/dts/mpfs-icicle-kit-fabric.dtsi
rename arch/riscv/dts/{microchip-mpfs-icicle-kit-u-boot.dtsi => mpfs-icicle-kit-u-boot.dtsi} (100%)
create mode 100644 arch/riscv/dts/mpfs-icicle-kit.dts
rename arch/riscv/dts/{microchip-mpfs.dtsi => mpfs.dtsi} (57%)
create mode 100644 arch/riscv/include/asm/atomic.h
delete mode 100644 include/dt-bindings/interrupt-controller/microchip-mpfs-plic.h
delete mode 100644 include/dt-bindings/interrupt-controller/riscv-hart.h
Best regards,
Leo
next reply other threads:[~2023-07-06 10:46 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-06 10:45 Leo Liang [this message]
2023-07-06 20:02 ` [PULL] u-boot-riscv/riscv-for-next Tom Rini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZKabX3HI7USoCEEt@ubuntu01 \
--to=ycliang@andestech.com \
--cc=rick@andestech.com \
--cc=trini@konsulko.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).