From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>,
xen-devel <xen-devel@lists.xenproject.org>
Cc: Wei Liu <wei.liu2@citrix.com>, Brian Woods <brian.woods@amd.com>,
Roger Pau Monne <roger.pau@citrix.com>
Subject: Re: [Xen-devel] [PATCH 3/5] x86/AMD: make C-state handling independent of Dom0
Date: Mon, 10 Jun 2019 17:28:33 +0100 [thread overview]
Message-ID: <483c4bbc-4915-48a3-9295-4d5a2bf6a02e@citrix.com> (raw)
In-Reply-To: <5CE68F830200007800231B3B@prv1-mh.provo.novell.com>
On 23/05/2019 13:18, Jan Beulich wrote:
> At least for more recent CPUs, following what BKDG / PPR suggest for the
> BIOS to surface via ACPI we can make ourselves independent of Dom0
> uploading respective data.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> TBD: Can we set local_apic_timer_c2_ok to true? I can't seem to find any
> statement in the BKDG / PPR as to whether the LAPIC timer continues
> running in CC6.
This ought to be easy to determine. Given the description of CC6
flushing the cache and power gating the core, I'd say there is a
reasonable chance that the LAPIC timer stops in CC6.
> TBD: We may want to verify that HLT indeed is configured to enter CC6.
I can't actually spot anything which talks about HLT directly. The
closest I can post is CFOH (cache flush on halt) which is an
auto-transition from CC1 to CC6 after a specific timeout, but the
wording suggests that mwait would also take this path.
> TBD: Brian's series specifies .target_residency as 1000 for CC6; may
> want to do so here as well. Question then is whether this value is
> also suitable for the older families.
Well - the PPR does say 400.
> TBD: I guess we could extend this to families older then Fam15 as well.
>
> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -1283,6 +1288,98 @@ long set_cx_pminfo(uint32_t acpi_id, str
> return 0;
> }
>
> +static void amd_cpuidle_init(struct acpi_processor_power *power)
> +{
> + unsigned int i, nr = 0;
> + const struct cpuinfo_x86 *c = ¤t_cpu_data;
> + const unsigned int ecx_req = CPUID5_ECX_EXTENSIONS_SUPPORTED |
> + CPUID5_ECX_INTERRUPT_BREAK;
> + const struct acpi_processor_cx *cx = NULL;
> + static const struct acpi_processor_cx fam17[] = {
> + {
> + .type = ACPI_STATE_C1,
> + .entry_method = ACPI_CSTATE_EM_FFH,
> + .address = 0,
> + .latency = 1,
> + },
> + {
> + .type = ACPI_STATE_C2,
> + .entry_method = ACPI_CSTATE_EM_HALT,
> + .latency = 400,
> + },
> + };
> +
> + if ( pm_idle_save && pm_idle != acpi_processor_idle )
> + return;
> +
> + if ( vendor_override < 0 )
> + return;
> +
> + switch ( c->x86 )
> + {
> + case 0x17:
With Hygon in the mix, this should be expanded to Fam18h.
~Andrew
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next prev parent reply other threads:[~2019-06-10 16:29 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-23 12:06 [PATCH 0/5] x86: CPU idle management adjustments Jan Beulich
2019-05-23 12:06 ` [Xen-devel] " Jan Beulich
2019-05-23 12:16 ` [PATCH 1/5] x86/cpuidle: switch to uniform meaning of "max_cstate=" Jan Beulich
2019-05-23 12:16 ` [Xen-devel] " Jan Beulich
2019-06-10 15:48 ` Andrew Cooper
2019-06-11 12:13 ` Jan Beulich
2019-05-23 12:17 ` [PATCH 2/5] x86/cpuidle: really use C1 for "urgent" CPUs Jan Beulich
2019-05-23 12:17 ` [Xen-devel] " Jan Beulich
2019-06-10 15:50 ` Andrew Cooper
2019-05-23 12:18 ` [PATCH 3/5] x86/AMD: make C-state handling independent of Dom0 Jan Beulich
2019-05-23 12:18 ` [Xen-devel] " Jan Beulich
2019-06-10 16:28 ` Andrew Cooper [this message]
2019-06-11 12:42 ` Jan Beulich
2019-06-18 17:22 ` Woods, Brian
2019-06-19 6:20 ` Jan Beulich
2019-06-19 15:54 ` Woods, Brian
2019-06-21 6:37 ` Jan Beulich
2019-06-21 14:29 ` Woods, Brian
2019-06-21 14:56 ` Jan Beulich
2019-06-21 15:26 ` Woods, Brian
2019-05-23 12:18 ` [PATCH 4/5] x86: allow limiting the max C-state sub-state Jan Beulich
2019-05-23 12:18 ` [Xen-devel] " Jan Beulich
2019-06-10 16:43 ` Andrew Cooper
2019-06-11 12:46 ` Jan Beulich
2019-05-23 12:19 ` [PATCH 5/5] tools/libxc: allow controlling " Jan Beulich
2019-05-23 12:19 ` [Xen-devel] " Jan Beulich
2019-05-24 14:00 ` Wei Liu
2019-05-24 14:00 ` [Xen-devel] " Wei Liu
2019-06-10 16:54 ` Andrew Cooper
2019-06-11 12:50 ` Jan Beulich
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