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From: Shanker Donthineni <shankerd@codeaurora.org>
To: Julien Grall <julien.grall@arm.com>,
	xen-devel <xen-devel@lists.xensource.com>,
	Stefano Stabellini <sstabellini@kernel.org>
Cc: Andre Przywara <andre.przywara@arm.com>,
	Philip Elcan <pelcan@codeaurora.org>,
	Vikram Sethi <vikrams@codeaurora.org>,
	Wei Chen <wei.chen@linaro.org>
Subject: Re: [PATCH V6 2/3] drivers/pl011: Use combination of UARTRIS and UARTMSC instead of UARTMIS
Date: Tue, 7 Jun 2016 09:03:58 -0500	[thread overview]
Message-ID: <5756D44E.6010001@codeaurora.org> (raw)
In-Reply-To: <5756D2FA.4050108@arm.com>

Hi Julien,

On 06/07/2016 08:58 AM, Julien Grall wrote:
> Hello Shanker,
>
> On 06/06/16 23:58, Shanker Donthineni wrote:
>> The Masked interrupt status register (UARTMIS) is not described in ARM
>> SBSA 2.x document. Anding of two registers UARTMSC and UARTRIS values
>> gives the same information as register UARTMIS.
>>
>> UARTRIS, UARTMSC and UARTMIS definitions are found in PrimeCell UART
>> PL011 (Revision: r1p4).
>>   - 3.3.10 Interrupt mask set/clear register, UARTIMSC
>>   - 3.3.11 Raw interrupt status register, UARTRIS
>>   - 3.3.12 Masked interrupt status register, UARTMIS
>>
>> This change is necessary for driver to be SBSA compliant v2.x without
>> affecting the current driver functionality.
>>
>> Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
>> ---
>>    Fixed typo in commit text.
>>
>>   xen/drivers/char/pl011.c | 7 +++++--
>>   1 file changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c
>> index 6a3c21b..755a965 100644
>> --- a/xen/drivers/char/pl011.c
>> +++ b/xen/drivers/char/pl011.c
>> @@ -57,7 +57,10 @@ static void pl011_interrupt(int irq, void *data, struct cpu_user_regs *regs)
>>   {
>>       struct serial_port *port = data;
>>       struct pl011 *uart = port->uart;
>> -    unsigned int status = pl011_read(uart, MIS);
>> +    unsigned int status;
>> +
>> +    /* UARTMIS is not documented in SBSA v2.x, so using UARTRIS/UARTIMSC */
>> +    status = pl011_read(uart, RIS) & pl011_read(uart, IMSC);
>
> Please use an helper here to avoid code duplication and have the comment in both place.
>
Sure, I'll move to a separate function 'pl011_intr_status(uart)'. Do you have any other comment?

>>
>>       if ( status )
>>       {
>> @@ -76,7 +79,7 @@ static void pl011_interrupt(int irq, void *data, struct cpu_user_regs *regs)
>>               if ( status & (TXI) )
>>                   serial_tx_interrupt(port, regs);
>>
>> -            status = pl011_read(uart, MIS);
>> +            status = pl011_read(uart, RIS) & pl011_read(uart, IMSC);
>>           } while (status != 0);
>>       }
>>   }
>>
>
> Regards,
>

-- 
Shanker Donthineni
Qualcomm Technologies, Inc. on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project


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  reply	other threads:[~2016-06-07 14:03 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-06 22:58 [PATCH V6 1/3] drivers/pl011: Don't configure baudrate Shanker Donthineni
2016-06-06 22:58 ` [PATCH V6 2/3] drivers/pl011: Use combination of UARTRIS and UARTMSC instead of UARTMIS Shanker Donthineni
2016-06-07 13:58   ` Julien Grall
2016-06-07 14:03     ` Shanker Donthineni [this message]
2016-06-07 14:09       ` Julien Grall
2016-06-06 22:59 ` [PATCH V6 3/3] arm/acpi: Add Server Base System Architecture UART support Shanker Donthineni
2016-06-07 14:09   ` Julien Grall
2016-06-07 14:00 ` [PATCH V6 1/3] drivers/pl011: Don't configure baudrate Julien Grall

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