Re: [Xen-devel] [RFC 5/6] arm64: call enter_hypervisor_head only when it is needed

From: Julien Grall <julien.grall@arm.com>
To: Andrii Anisov <andrii.anisov@gmail.com>, xen-devel@lists.xenproject.org
Cc: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Andrii Anisov <andrii_anisov@epam.com>,
	Andre Przywara <andre.przywara@arm.com>
Subject: Re: [Xen-devel] [RFC 5/6] arm64: call enter_hypervisor_head only when it is needed
Date: Wed, 31 Jul 2019 12:02:20 +0100	[thread overview]
Message-ID: <8c7bc6d1-3482-ec5b-b3d9-c6562caf5711@arm.com> (raw)
In-Reply-To: <63256c34-fab7-1fb8-3637-9c5a50d6d6bf@gmail.com>

Hi Andrii,

On 30/07/2019 18:35, Andrii Anisov wrote:
> 
> On 26.07.19 13:59, Julien Grall wrote:
>> Hi,
>>
>> On 26/07/2019 11:37, Andrii Anisov wrote:
>>> From: Andrii Anisov <andrii_anisov@epam.com>
>>>
>>> On ARM64 we know exactly if trap happened from hypervisor or guest, so
>>> we do not need to take that decision. This reduces a condition for
>>> all enter_hypervisor_head calls and the function call for traps from
>>> the hypervisor mode.
>>
>> One condition lost but ...
> 
> ...In the hot path (actually at any trap).

Everything is in the hot path here, yet there are a lot of other branches. So 
why this branch in particular?

As I have mentioned a few times before, there are a difference between the 
theory and the practice. In theory, removing a branch looks nice. But in 
practice this may not be the case.

In this particular case, I don't believe this is going to have a real impact on 
the performance.

The PSTATE has been saved a few instructions before in cpu_user_regs, so there
are high chance the value will still be in the L1 cache.

The compiler may also decide to do the direct branch when not in guest_mode. A 
trap from the hypervisor is mostly for interrupts. So there are chance this is 
not going to have a real impact on the overall of the interrupt handling.

If you are really worry of the impact of branch then there are a few more 
important places (with a greater benefits) to look:
     1) It seems the compiler use a jump table for the switch case in 
do_trap_guest_sync(), so it will result to multiple direct branch everytime.
     2) Indirect branch have a non-negligible cost compare to direct branch. 
This is a lot used in the interrupt code (see gic_hw_ops->read_irq()). All of 
them are known at boot time, so they could be replace with direct branch. x86 
recently introduced alternative_call() for this purpose. This could be re-used 
on Arm.

Cheers,

-- 
Julien Grall

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