xen-devel.lists.xenproject.org archive mirror
 help / color / mirror / Atom feed
From: Stefano Stabellini <sstabellini@kernel.org>
To: Sergiy Kibrik <Sergiy_Kibrik@epam.com>
Cc: xen-devel@lists.xenproject.org, "Jan Beulich" <jbeulich@suse.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	"Stefano Stabellini" <sstabellini@kernel.org>
Subject: Re: [XEN PATCH v1 7/7] x86/MCE: optional build of AMD/Intel MCE code
Date: Fri, 26 Apr 2024 16:16:09 -0700 (PDT)	[thread overview]
Message-ID: <alpine.DEB.2.22.394.2404261615250.3940@ubuntu-linux-20-04-desktop> (raw)
In-Reply-To: <82df6ef350a2b4f42ec7adf12a90ebeae1d133f6.1713860310.git.Sergiy_Kibrik@epam.com>

On Tue, 23 Apr 2024, Sergiy Kibrik wrote:
> Separate Intel/AMD-specific MCE code using CONFIG_{INTEL,AMD} config options.
> Now we can avoid build of mcheck code if support for specific platform is
> intentionally disabled by configuration.
> 
> Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@epam.com>
> ---
>  xen/arch/x86/cpu/mcheck/Makefile    | 6 ++----
>  xen/arch/x86/cpu/mcheck/non-fatal.c | 6 ++++++
>  xen/arch/x86/cpu/mcheck/vmce.h      | 1 +
>  3 files changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/xen/arch/x86/cpu/mcheck/Makefile b/xen/arch/x86/cpu/mcheck/Makefile
> index f927f10b4d..5b3f6d875c 100644
> --- a/xen/arch/x86/cpu/mcheck/Makefile
> +++ b/xen/arch/x86/cpu/mcheck/Makefile
> @@ -1,12 +1,10 @@
> -obj-y += amd_nonfatal.o
> -obj-y += mce_amd.o
>  obj-y += mcaction.o
>  obj-y += barrier.o
> -obj-y += intel-nonfatal.o
>  obj-y += mctelem.o
>  obj-y += mce.o
>  obj-y += mce-apei.o
> -obj-y += mce_intel.o
> +obj-$(CONFIG_AMD) += mce_amd.o amd_nonfatal.o
> +obj-$(CONFIG_INTEL) += mce_intel.o intel-nonfatal.o
>  obj-y += non-fatal.o
>  obj-y += util.o
>  obj-y += vmce.o

Awesome!

Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>


> diff --git a/xen/arch/x86/cpu/mcheck/non-fatal.c b/xen/arch/x86/cpu/mcheck/non-fatal.c
> index 33cacd15c2..2d91a3b1e0 100644
> --- a/xen/arch/x86/cpu/mcheck/non-fatal.c
> +++ b/xen/arch/x86/cpu/mcheck/non-fatal.c
> @@ -24,14 +24,20 @@ static int __init cf_check init_nonfatal_mce_checker(void)
>  	 * Check for non-fatal errors every MCE_RATE s
>  	 */
>  	switch (c->x86_vendor) {
> +#ifdef CONFIG_AMD
>  	case X86_VENDOR_AMD:
>  	case X86_VENDOR_HYGON:
>  		/* Assume we are on K8 or newer AMD or Hygon CPU here */
>  		amd_nonfatal_mcheck_init(c);
>  		break;
> +#endif
> +#ifdef CONFIG_INTEL
>  	case X86_VENDOR_INTEL:
>  		intel_nonfatal_mcheck_init(c);
>  		break;
> +#endif
> +	default:
> +		return -ENODEV;
>  	}
>  	printk(KERN_INFO "mcheck_poll: Machine check polling timer started.\n");
>  	return 0;

For consistency in all other cases this patch series uses IS_ENABLED
checks. They could be used here as well.


  reply	other threads:[~2024-04-26 23:16 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-23  8:45 [XEN PATCH v1 0/7] x86: make Intel/AMD vPMU & MCE support configurable Sergiy Kibrik
2024-04-23  8:48 ` [XEN PATCH v1 1/7] x86/vpmu: separate amd/intel vPMU code Sergiy Kibrik
2024-04-26 23:00   ` Stefano Stabellini
2024-04-29 15:28   ` Jan Beulich
2024-04-30  9:07     ` Sergiy Kibrik
2024-04-23  8:50 ` [XEN PATCH v1 2/7] x86/intel: guard vmce_has_lmce() with INTEL option Sergiy Kibrik
2024-04-26 23:04   ` Stefano Stabellini
2024-04-29 15:34   ` Jan Beulich
2024-04-30  9:42     ` Sergiy Kibrik
2024-04-23  8:52 ` [XEN PATCH v1 3/7] x86/MCE: guard access to Intel/AMD-specific MCA MSRs Sergiy Kibrik
2024-04-26 23:08   ` Stefano Stabellini
2024-04-29 15:41   ` Jan Beulich
2024-04-23  8:54 ` [XEN PATCH v1 4/7] x86/MCE: guard lmce_support/cmci_support Sergiy Kibrik
2024-04-26 23:10   ` Stefano Stabellini
2024-04-29 15:42   ` Jan Beulich
2024-05-02  8:56     ` Sergiy Kibrik
2024-04-23  8:56 ` [XEN PATCH v1 5/7] x86/MCE: guard {intel/amd}_mcheck_init() calls Sergiy Kibrik
2024-04-26 23:12   ` Stefano Stabellini
2024-04-29 15:45   ` Jan Beulich
2024-04-23  8:58 ` [XEN PATCH v1 6/7] x86/MCE: guard call to Intel-specific intel_get_extended_msrs() Sergiy Kibrik
2024-04-26 23:14   ` Stefano Stabellini
2024-04-29 15:47     ` Jan Beulich
2024-04-23  9:00 ` [XEN PATCH v1 7/7] x86/MCE: optional build of AMD/Intel MCE code Sergiy Kibrik
2024-04-26 23:16   ` Stefano Stabellini [this message]
2024-04-29 15:54     ` Jan Beulich
2024-05-02  8:59       ` Sergiy Kibrik

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=alpine.DEB.2.22.394.2404261615250.3940@ubuntu-linux-20-04-desktop \
    --to=sstabellini@kernel.org \
    --cc=Sergiy_Kibrik@epam.com \
    --cc=andrew.cooper3@citrix.com \
    --cc=jbeulich@suse.com \
    --cc=roger.pau@citrix.com \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).