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From: Andrzej Hajda <andrzej.hajda@intel.com>
To: Smitha T Murthy <smitha.t@samsung.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-media@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Cc: <m.szyprowski@samsung.com>, <mchehab@kernel.org>,
	<hverkuil-cisco@xs4all.nl>, <ezequiel@vanguardiasur.com.ar>,
	<jernej.skrabec@gmail.com>, <benjamin.gaignard@collabora.com>,
	<stanimir.varbanov@linaro.org>, <dillon.minfei@gmail.com>,
	<david.plowman@raspberrypi.com>, <mark.rutland@arm.com>,
	<robh+dt@kernel.org>, <krzk+dt@kernel.org>, <andi@etezian.org>,
	<alim.akhtar@samsung.com>, <aswani.reddy@samsung.com>,
	<pankaj.dubey@samsung.com>, <linux-fsd@tesla.com>
Subject: Re: [PATCH 04/20] media: s5p-mfc: Rename IS_MFCV10 macro
Date: Wed, 18 May 2022 10:41:22 +0200	[thread overview]
Message-ID: <002e5ec2-478d-ca10-5a71-5390dfb69173@intel.com> (raw)
In-Reply-To: <20220517125548.14746-5-smitha.t@samsung.com>



On 17.05.2022 14:55, Smitha T Murthy wrote:
> Renames macro IS_MFCV10 to IS_MFCV10_PLUS so that the MFCv10
> code can be resued for MFCv12 support. Since some part of MFCv10
> specific code holds good for MFCv12 also.
>
> Cc: linux-fsd@tesla.com
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
>   .../platform/samsung/s5p-mfc/s5p_mfc_common.h |  4 +--
>   .../platform/samsung/s5p-mfc/s5p_mfc_ctrl.c   |  2 +-
>   .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 28 +++++++++----------
>   3 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
> index 5304f42c8c72..ae266d8518d1 100644
> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
> @@ -774,8 +774,8 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
>   #define IS_MFCV6_PLUS(dev)	(dev->variant->version >= 0x60 ? 1 : 0)
>   #define IS_MFCV7_PLUS(dev)	(dev->variant->version >= 0x70 ? 1 : 0)
>   #define IS_MFCV8_PLUS(dev)	(dev->variant->version >= 0x80 ? 1 : 0)
> -#define IS_MFCV10(dev)		(dev->variant->version >= 0xA0 ? 1 : 0)
> -#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
> +#define IS_MFCV10_PLUS(dev)	(dev->variant->version >= 0xA0 ? 1 : 0)

The " ? 1 : 0" part of the macro is redundant, you can remove it here 
and in other IS_MFC*_PLUS macros.

> +#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10_PLUS(dev))
>   
>   #define MFC_V5_BIT	BIT(0)
>   #define MFC_V6_BIT	BIT(1)
> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
> index 72d70984e99a..ffe9f7e79eca 100644
> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
> @@ -236,7 +236,7 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
>   	else
>   		mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
>   
> -	if (IS_MFCV10(dev))
> +	if (IS_MFCV10_PLUS(dev))
>   		mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10);
>   
>   	mfc_debug(2, "Will now wait for completion of firmware transfer\n");
> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
> index 8227004f6746..728d255e65fc 100644
> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
> @@ -72,9 +72,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   			  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
>   		mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
>   	} else if (ctx->type == MFCINST_ENCODER) {
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev))
>   			ctx->tmv_buffer_size = 0;
> -		} else if (IS_MFCV8_PLUS(dev))
> +		else if (IS_MFCV8_PLUS(dev))
>   			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
>   			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
>   			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> @@ -82,7 +82,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
>   			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
>   			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width);
>   			lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height);
>   			if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
> @@ -133,7 +133,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   	switch (ctx->codec_mode) {
>   	case S5P_MFC_CODEC_H264_DEC:
>   	case S5P_MFC_CODEC_H264_MVC_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else if (IS_MFCV8_PLUS(dev))
>   			ctx->scratch_buf_size =
> @@ -152,7 +152,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   			(ctx->mv_count * ctx->mv_size);
>   		break;
>   	case S5P_MFC_CODEC_MPEG4_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else if (IS_MFCV7_PLUS(dev)) {
>   			ctx->scratch_buf_size =
> @@ -172,7 +172,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		break;
>   	case S5P_MFC_CODEC_VC1RCV_DEC:
>   	case S5P_MFC_CODEC_VC1_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else
>   			ctx->scratch_buf_size =
> @@ -189,7 +189,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		ctx->bank2.size = 0;
>   		break;
>   	case S5P_MFC_CODEC_H263_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else
>   			ctx->scratch_buf_size =
> @@ -201,7 +201,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		ctx->bank1.size = ctx->scratch_buf_size;
>   		break;
>   	case S5P_MFC_CODEC_VP8_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else if (IS_MFCV8_PLUS(dev))
>   			ctx->scratch_buf_size =
> @@ -230,7 +230,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   			DEC_VP9_STATIC_BUFFER_SIZE;
>   		break;
>   	case S5P_MFC_CODEC_H264_ENC:
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   			ctx->me_buffer_size =
>   			ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
> @@ -254,7 +254,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		break;
>   	case S5P_MFC_CODEC_MPEG4_ENC:
>   	case S5P_MFC_CODEC_H263_ENC:
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   			ctx->me_buffer_size =
>   				ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
> @@ -273,7 +273,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		ctx->bank2.size = 0;
>   		break;
>   	case S5P_MFC_CODEC_VP8_ENC:
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   			ctx->me_buffer_size =
>   				ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
> @@ -452,7 +452,7 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
>   
>   	if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
>   			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
>   					ctx->img_height);
>   		} else {
> @@ -668,7 +668,7 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
>   
>   	mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
>   
> -	if (IS_MFCV10(dev)) {
> +	if (IS_MFCV10_PLUS(dev)) {
>   		/* start address of per buffer is aligned */
>   		for (i = 0; i < ctx->pb_count; i++) {
>   			writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> @@ -2455,7 +2455,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
>   	R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
>   	R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
>   
> -	if (!IS_MFCV10(dev))
> +	if (!IS_MFCV10_PLUS(dev))
>   		goto done;
>   
>   	/* Initialize registers used in MFC v10 only.


WARNING: multiple messages have this Message-ID (diff)
From: Andrzej Hajda <andrzej.hajda@intel.com>
To: Smitha T Murthy <smitha.t@samsung.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-media@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Cc: <m.szyprowski@samsung.com>, <mchehab@kernel.org>,
	<hverkuil-cisco@xs4all.nl>, <ezequiel@vanguardiasur.com.ar>,
	<jernej.skrabec@gmail.com>, <benjamin.gaignard@collabora.com>,
	<stanimir.varbanov@linaro.org>, <dillon.minfei@gmail.com>,
	<david.plowman@raspberrypi.com>, <mark.rutland@arm.com>,
	<robh+dt@kernel.org>, <krzk+dt@kernel.org>, <andi@etezian.org>,
	<alim.akhtar@samsung.com>, <aswani.reddy@samsung.com>,
	<pankaj.dubey@samsung.com>, <linux-fsd@tesla.com>
Subject: Re: [PATCH 04/20] media: s5p-mfc: Rename IS_MFCV10 macro
Date: Wed, 18 May 2022 10:41:22 +0200	[thread overview]
Message-ID: <002e5ec2-478d-ca10-5a71-5390dfb69173@intel.com> (raw)
In-Reply-To: <20220517125548.14746-5-smitha.t@samsung.com>



On 17.05.2022 14:55, Smitha T Murthy wrote:
> Renames macro IS_MFCV10 to IS_MFCV10_PLUS so that the MFCv10
> code can be resued for MFCv12 support. Since some part of MFCv10
> specific code holds good for MFCv12 also.
>
> Cc: linux-fsd@tesla.com
> Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
> ---
>   .../platform/samsung/s5p-mfc/s5p_mfc_common.h |  4 +--
>   .../platform/samsung/s5p-mfc/s5p_mfc_ctrl.c   |  2 +-
>   .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 28 +++++++++----------
>   3 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
> index 5304f42c8c72..ae266d8518d1 100644
> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h
> @@ -774,8 +774,8 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
>   #define IS_MFCV6_PLUS(dev)	(dev->variant->version >= 0x60 ? 1 : 0)
>   #define IS_MFCV7_PLUS(dev)	(dev->variant->version >= 0x70 ? 1 : 0)
>   #define IS_MFCV8_PLUS(dev)	(dev->variant->version >= 0x80 ? 1 : 0)
> -#define IS_MFCV10(dev)		(dev->variant->version >= 0xA0 ? 1 : 0)
> -#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
> +#define IS_MFCV10_PLUS(dev)	(dev->variant->version >= 0xA0 ? 1 : 0)

The " ? 1 : 0" part of the macro is redundant, you can remove it here 
and in other IS_MFC*_PLUS macros.

> +#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10_PLUS(dev))
>   
>   #define MFC_V5_BIT	BIT(0)
>   #define MFC_V6_BIT	BIT(1)
> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
> index 72d70984e99a..ffe9f7e79eca 100644
> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c
> @@ -236,7 +236,7 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
>   	else
>   		mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
>   
> -	if (IS_MFCV10(dev))
> +	if (IS_MFCV10_PLUS(dev))
>   		mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10);
>   
>   	mfc_debug(2, "Will now wait for completion of firmware transfer\n");
> diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
> index 8227004f6746..728d255e65fc 100644
> --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
> +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c
> @@ -72,9 +72,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   			  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
>   		mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
>   	} else if (ctx->type == MFCINST_ENCODER) {
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev))
>   			ctx->tmv_buffer_size = 0;
> -		} else if (IS_MFCV8_PLUS(dev))
> +		else if (IS_MFCV8_PLUS(dev))
>   			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
>   			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
>   			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> @@ -82,7 +82,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   			ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
>   			ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
>   			S5P_FIMV_TMV_BUFFER_ALIGN_V6);
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width);
>   			lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height);
>   			if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
> @@ -133,7 +133,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   	switch (ctx->codec_mode) {
>   	case S5P_MFC_CODEC_H264_DEC:
>   	case S5P_MFC_CODEC_H264_MVC_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else if (IS_MFCV8_PLUS(dev))
>   			ctx->scratch_buf_size =
> @@ -152,7 +152,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   			(ctx->mv_count * ctx->mv_size);
>   		break;
>   	case S5P_MFC_CODEC_MPEG4_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else if (IS_MFCV7_PLUS(dev)) {
>   			ctx->scratch_buf_size =
> @@ -172,7 +172,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		break;
>   	case S5P_MFC_CODEC_VC1RCV_DEC:
>   	case S5P_MFC_CODEC_VC1_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else
>   			ctx->scratch_buf_size =
> @@ -189,7 +189,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		ctx->bank2.size = 0;
>   		break;
>   	case S5P_MFC_CODEC_H263_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else
>   			ctx->scratch_buf_size =
> @@ -201,7 +201,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		ctx->bank1.size = ctx->scratch_buf_size;
>   		break;
>   	case S5P_MFC_CODEC_VP8_DEC:
> -		if (IS_MFCV10(dev))
> +		if (IS_MFCV10_PLUS(dev))
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   		else if (IS_MFCV8_PLUS(dev))
>   			ctx->scratch_buf_size =
> @@ -230,7 +230,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   			DEC_VP9_STATIC_BUFFER_SIZE;
>   		break;
>   	case S5P_MFC_CODEC_H264_ENC:
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   			ctx->me_buffer_size =
>   			ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16);
> @@ -254,7 +254,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		break;
>   	case S5P_MFC_CODEC_MPEG4_ENC:
>   	case S5P_MFC_CODEC_H263_ENC:
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   			ctx->me_buffer_size =
>   				ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width,
> @@ -273,7 +273,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx)
>   		ctx->bank2.size = 0;
>   		break;
>   	case S5P_MFC_CODEC_VP8_ENC:
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			mfc_debug(2, "Use min scratch buffer size\n");
>   			ctx->me_buffer_size =
>   				ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height),
> @@ -452,7 +452,7 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
>   
>   	if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
>   			ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
> -		if (IS_MFCV10(dev)) {
> +		if (IS_MFCV10_PLUS(dev)) {
>   			ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
>   					ctx->img_height);
>   		} else {
> @@ -668,7 +668,7 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx)
>   
>   	mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1);
>   
> -	if (IS_MFCV10(dev)) {
> +	if (IS_MFCV10_PLUS(dev)) {
>   		/* start address of per buffer is aligned */
>   		for (i = 0; i < ctx->pb_count; i++) {
>   			writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i));
> @@ -2455,7 +2455,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
>   	R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8);
>   	R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8);
>   
> -	if (!IS_MFCV10(dev))
> +	if (!IS_MFCV10_PLUS(dev))
>   		goto done;
>   
>   	/* Initialize registers used in MFC v10 only.


_______________________________________________
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  reply	other threads:[~2022-05-18  8:41 UTC|newest]

Thread overview: 92+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20220517125511epcas5p4e9a4e3c327771dd1faf0a50057a2c17b@epcas5p4.samsung.com>
2022-05-17 12:55 ` [PATCH 00/20] Add MFC v12 support Smitha T Murthy
2022-05-17 12:55   ` Smitha T Murthy
     [not found]   ` <CGME20220517125551epcas5p42cca7f0a2db6dc1d16d0e27265c43f56@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 01/20] MAINTAINERS: Add git repo path for MFC Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 13:35       ` Krzysztof Kozlowski
2022-05-17 13:35         ` Krzysztof Kozlowski
     [not found]   ` <CGME20220517125554epcas5p4e87a71471525056281f1578f4f80f760@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 02/20] dt-bindings: media: s5p-mfc: Convert s5p-mfc.txt to new DT schema Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 13:55       ` Krzysztof Kozlowski
2022-05-17 13:55         ` Krzysztof Kozlowski
2022-07-05 11:44         ` Smitha T Murthy
2022-07-05 11:44           ` Smitha T Murthy
2022-07-05 12:08           ` Krzysztof Kozlowski
2022-07-05 12:08             ` Krzysztof Kozlowski
2022-05-17 20:19       ` Rob Herring
2022-05-17 20:19         ` Rob Herring
     [not found]   ` <CGME20220517125558epcas5p228cdf5f665468d3fd065d88a5d0ad157@epcas5p2.samsung.com>
2022-05-17 12:55     ` [PATCH 03/20] dt-bindings: media: s5p-mfc: Add mfcv12 variant Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 13:58       ` Krzysztof Kozlowski
2022-05-17 13:58         ` Krzysztof Kozlowski
2022-07-05 11:46         ` Smitha T Murthy
2022-07-05 11:46           ` Smitha T Murthy
     [not found]   ` <CGME20220517125601epcas5p47dfcac0c5e0c412eb0c335759c51c941@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 04/20] media: s5p-mfc: Rename IS_MFCV10 macro Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-18  8:41       ` Andrzej Hajda [this message]
2022-05-18  8:41         ` Andrzej Hajda
2022-05-19  6:46         ` Andrzej Hajda
2022-05-19  6:46           ` Andrzej Hajda
     [not found]   ` <CGME20220517125605epcas5p44cbb77e6bc15ceb32a934e326fc777ef@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 05/20] media: s5p-mfc: Add initial support for MFCv12 Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-18 11:38       ` Andrzej Hajda
2022-05-18 11:38         ` Andrzej Hajda
     [not found]   ` <CGME20220517125608epcas5p48b5d2f91c711e5728f993169b1d4b9a1@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 06/20] Documention: v4l: Documentation for VP9 CIDs Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 13:13       ` Nicolas Dufresne
2022-05-17 13:13         ` Nicolas Dufresne
2022-07-05 11:26         ` Smitha T Murthy
2022-07-05 11:26           ` Smitha T Murthy
2022-05-18  9:45       ` Hans Verkuil
2022-05-18  9:45         ` Hans Verkuil
     [not found]   ` <CGME20220517125612epcas5p28e4cc7a208d1ac68267fa845e932ccc9@epcas5p2.samsung.com>
2022-05-17 12:55     ` [PATCH 07/20] media: v4l2: Add v4l2 control IDs for VP9 encoder Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
     [not found]   ` <CGME20220517125615epcas5p200c1b10090dc03e430d720d1435afccf@epcas5p2.samsung.com>
2022-05-17 12:55     ` [PATCH 08/20] media: s5p-mfc: Add support " Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
     [not found]   ` <CGME20220517125618epcas5p2e52b4a0e2895c7bd3dab3df27ae2ea1d@epcas5p2.samsung.com>
2022-05-17 12:55     ` [PATCH 09/20] media: s5p-mfc: Add YV12 and I420 multiplanar format support Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
     [not found]   ` <CGME20220517125622epcas5p324e57e1a7d76f77898d54eb01686945a@epcas5p3.samsung.com>
2022-05-17 12:55     ` [PATCH 10/20] media: s5p-mfc: Add support for rate controls in MFCv12 Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
     [not found]   ` <CGME20220517125625epcas5p3a5d6e217570e2e2f4e11b4c099d45767@epcas5p3.samsung.com>
2022-05-17 12:55     ` [PATCH 11/20] media: s5p-mfc: Add support for UHD encoding Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-18  9:50       ` Hans Verkuil
2022-05-18  9:50         ` Hans Verkuil
     [not found]   ` <CGME20220517125629epcas5p4c99993ea5e464b296ff6dfec85b4c441@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 12/20] media: s5p-mfc: Add support for DMABUF for encoder Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
     [not found]   ` <CGME20220517125634epcas5p40259b75a9ea07495330144310d61a5c9@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 13/20] media: s5p-mfc: Set context for valid case before calling try_run Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
     [not found]   ` <CGME20220517125637epcas5p4f691d6c9011d3e82f2d776c440816d98@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 14/20] media: s5p-mfc: Load firmware for each run in MFCv12 Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
     [not found]   ` <CGME20220517125641epcas5p48fc3d48ad5e4a02879a1063da36c0063@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 15/20] media: s5p-mfc: DPB Count Independent of VIDIOC_REQBUF Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 13:59       ` Krzysztof Kozlowski
2022-05-17 13:59         ` Krzysztof Kozlowski
2022-07-05 11:47         ` Smitha T Murthy
2022-07-05 11:47           ` Smitha T Murthy
     [not found]   ` <CGME20220517125644epcas5p3fcabdc953c042cc9f2697f7fbfc74121@epcas5p3.samsung.com>
2022-05-17 12:55     ` [PATCH 16/20] media: s5p-mfc: Fix to handle reference queue during finishing Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 14:04       ` Krzysztof Kozlowski
2022-05-17 14:04         ` Krzysztof Kozlowski
     [not found]   ` <CGME20220517125648epcas5p22201053e8a71dcd5ccc8d0566511b635@epcas5p2.samsung.com>
2022-05-17 12:55     ` [PATCH 17/20] media: s5p-mfc: Clear workbit to handle error condition Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 14:04       ` Krzysztof Kozlowski
2022-05-17 14:04         ` Krzysztof Kozlowski
2022-07-05 11:52         ` Smitha T Murthy
2022-07-05 11:52           ` Smitha T Murthy
     [not found]   ` <CGME20220517125652epcas5p31abe2138fbff6218c9031da714bfb448@epcas5p3.samsung.com>
2022-05-17 12:55     ` [PATCH 18/20] media: s5p-mfc: Correction in register read and write for H264 Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 14:04       ` Krzysztof Kozlowski
2022-05-17 14:04         ` Krzysztof Kozlowski
2022-07-05 11:50         ` Smitha T Murthy
2022-07-05 11:50           ` Smitha T Murthy
     [not found]   ` <CGME20220517125656epcas5p1cc1296b200ff8801f24243aa47de8fe1@epcas5p1.samsung.com>
2022-05-17 12:55     ` [PATCH 19/20] arm64: dts: fsd: Add MFC related DT enteries Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 14:02       ` Krzysztof Kozlowski
2022-05-17 14:02         ` Krzysztof Kozlowski
2022-07-05 11:49         ` Smitha T Murthy
2022-07-05 11:49           ` Smitha T Murthy
     [not found]   ` <CGME20220517125659epcas5p4f344138f5b8a64f9e49c6cba4f0af92f@epcas5p4.samsung.com>
2022-05-17 12:55     ` [PATCH 20/20] arm64 defconfig: Add MFC in defconfig Smitha T Murthy
2022-05-17 12:55       ` Smitha T Murthy
2022-05-17 14:03       ` Krzysztof Kozlowski
2022-05-17 14:03         ` Krzysztof Kozlowski
2022-05-18  9:42   ` [PATCH 00/20] Add MFC v12 support Hans Verkuil
2022-05-18  9:42     ` Hans Verkuil

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