From: Michael Walle <michael@walle.cc> To: Vladimir Oltean <vladimir.oltean@nxp.com> Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Leo Li <leoyang.li@nxp.com>, "Y.b. Lu" <yangbo.lu@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>, Ashish Kumar <ashish.kumar@nxp.com> Subject: Re: [RFC PATCH v3 9/9] arm64: dts: lx2160a: fix FlexSPI clock Date: Mon, 09 Nov 2020 10:43:03 +0100 [thread overview] Message-ID: <0e165232e518c0f6c1b894311f00982a@walle.cc> (raw) In-Reply-To: <20201108212139.ht22zdk27pyxv6wc@skbuf> Am 2020-11-08 22:21, schrieb Vladimir Oltean: > On Sun, Nov 08, 2020 at 07:51:13PM +0100, Michael Walle wrote: >> Now that we have a proper driver for the FlexSPI interface use it. >> This >> will fix SCK frequency switching on Layerscape SoCs. >> >> Signed-off-by: Michael Walle <michael@walle.cc> >> --- >> Thanks to Vladimir Oltean, this was partially tested on a LX2160A RDB. >> But >> this patch is marked as RFC nonetheless, because there is too much >> difference in the clock tree between LS1028A and LX2160A. It would be >> nice >> if someone could test it and add a Tested-by. > > You want someone to probe the SCK frequency? No not really, just a thorough test. > I expect that if frequency > switching works on LS1028A, and the lx2160a_flexspi_divs table is > correct (which, based on the documentation for > FlexSPICR1[FlexSPI_CLK_DIV], > it is), then it would work on LX2160A too? The switching should work. Finding out wether it is correct can be checked by reading the raw register value, i.e. 01E0_0900h. But the parent clock is what is bothering me a little. Getting that wrong would lead to a wrong SCK output frequency albeit the divider is set to a correct value. > Is there a simple test that can be made in order to trivially determine > whether the frequencies are correct? We already found out that there seems to be kind of a saturation with higher frequencies, i.e. octal SPI bus is capable of a much higher throughput but we only achieve 50MB/s. I'd have expected a much higher datarate (I mean it is advertised as high performance and it uses a 8 bit wide databus..). But anyway, it might make sense to go the other way, i.e. find out the max datathroughput at lower frequencies and look if it makes sense. Assuming no DDR, the throughput should be around your frequency. For example, having 4 MHz should result in 4MB/s data throughput. OTOH we already saw that after linux booted - with the current device tree which has a setting of 50MHz max SCK frequency - the programmed divider by my driver is the same as the former setting (0x13, div-by-32); so this series doesn't change the SCK frequency. -michael
WARNING: multiple messages have this Message-ID (diff)
From: Michael Walle <michael@walle.cc> To: Vladimir Oltean <vladimir.oltean@nxp.com> Cc: devicetree@vger.kernel.org, Xiaowei Bao <xiaowei.bao@nxp.com>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, linux-kernel@vger.kernel.org, Leo Li <leoyang.li@nxp.com>, Ashish Kumar <ashish.kumar@nxp.com>, Rob Herring <robh+dt@kernel.org>, "Y.b. Lu" <yangbo.lu@nxp.com>, Shawn Guo <shawnguo@kernel.org>, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [RFC PATCH v3 9/9] arm64: dts: lx2160a: fix FlexSPI clock Date: Mon, 09 Nov 2020 10:43:03 +0100 [thread overview] Message-ID: <0e165232e518c0f6c1b894311f00982a@walle.cc> (raw) In-Reply-To: <20201108212139.ht22zdk27pyxv6wc@skbuf> Am 2020-11-08 22:21, schrieb Vladimir Oltean: > On Sun, Nov 08, 2020 at 07:51:13PM +0100, Michael Walle wrote: >> Now that we have a proper driver for the FlexSPI interface use it. >> This >> will fix SCK frequency switching on Layerscape SoCs. >> >> Signed-off-by: Michael Walle <michael@walle.cc> >> --- >> Thanks to Vladimir Oltean, this was partially tested on a LX2160A RDB. >> But >> this patch is marked as RFC nonetheless, because there is too much >> difference in the clock tree between LS1028A and LX2160A. It would be >> nice >> if someone could test it and add a Tested-by. > > You want someone to probe the SCK frequency? No not really, just a thorough test. > I expect that if frequency > switching works on LS1028A, and the lx2160a_flexspi_divs table is > correct (which, based on the documentation for > FlexSPICR1[FlexSPI_CLK_DIV], > it is), then it would work on LX2160A too? The switching should work. Finding out wether it is correct can be checked by reading the raw register value, i.e. 01E0_0900h. But the parent clock is what is bothering me a little. Getting that wrong would lead to a wrong SCK output frequency albeit the divider is set to a correct value. > Is there a simple test that can be made in order to trivially determine > whether the frequencies are correct? We already found out that there seems to be kind of a saturation with higher frequencies, i.e. octal SPI bus is capable of a much higher throughput but we only achieve 50MB/s. I'd have expected a much higher datarate (I mean it is advertised as high performance and it uses a 8 bit wide databus..). But anyway, it might make sense to go the other way, i.e. find out the max datathroughput at lower frequencies and look if it makes sense. Assuming no DDR, the throughput should be around your frequency. For example, having 4 MHz should result in 4MB/s data throughput. OTOH we already saw that after linux booted - with the current device tree which has a setting of 50MHz max SCK frequency - the programmed divider by my driver is the same as the former setting (0x13, div-by-32); so this series doesn't change the SCK frequency. -michael _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-11-09 9:43 UTC|newest] Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-08 18:51 [PATCH v3 0/9] clk: qoriq fixes and new fsl-flexspi driver Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-11-08 18:51 ` [PATCH v3 1/9] arm64: dts: ls1028a: fix ENETC PTP clock input Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-11-30 9:20 ` Shawn Guo 2020-11-30 9:20 ` Shawn Guo 2020-11-08 18:51 ` [PATCH v3 2/9] arm64: dts: ls1028a: fix FlexSPI " Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-11-30 9:21 ` Shawn Guo 2020-11-30 9:21 ` Shawn Guo 2020-11-08 18:51 ` [PATCH v3 3/9] clk: qoriq: provide constants for the type Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-11-09 22:05 ` Rob Herring 2020-11-09 22:05 ` Rob Herring 2020-11-09 22:39 ` Michael Walle 2020-11-09 22:39 ` Michael Walle 2020-11-09 22:55 ` Rob Herring 2020-11-09 22:55 ` Rob Herring 2020-12-08 0:54 ` Stephen Boyd 2020-11-08 18:51 ` [PATCH v3 4/9] arm64: dts: ls1028a: use constants in the clockgen phandle Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-11-20 9:25 ` [EXT] " Ashish Kumar 2020-11-20 9:25 ` Ashish Kumar 2020-11-20 9:38 ` Michael Walle 2020-11-20 9:38 ` Michael Walle 2020-11-20 9:51 ` [EXT] " Ashish Kumar 2020-11-20 9:51 ` Ashish Kumar 2020-11-20 10:05 ` Michael Walle 2020-11-20 10:05 ` Michael Walle 2020-11-08 18:51 ` [PATCH v3 5/9] clk: divider: add devm_clk_hw_register_divider_table() Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-12-08 0:54 ` Stephen Boyd 2020-11-08 18:51 ` [PATCH v3 6/9] dt-bindings: clock: document the fsl-flexspi-clk driver Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-12-08 0:54 ` Stephen Boyd 2020-11-08 18:51 ` [PATCH v3 7/9] clk: fsl-flexspi: new driver Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-12-08 0:58 ` Stephen Boyd 2020-11-08 18:51 ` [PATCH v3 8/9] arm64: dts: ls1028a: fix FlexSPI clock Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-11-08 18:51 ` [RFC PATCH v3 9/9] arm64: dts: lx2160a: " Michael Walle 2020-11-08 18:51 ` Michael Walle 2020-11-08 21:21 ` Vladimir Oltean 2020-11-08 21:21 ` Vladimir Oltean 2020-11-09 9:43 ` Michael Walle [this message] 2020-11-09 9:43 ` Michael Walle
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