From: Geert Uytterhoeven <geert+renesas@glider.be> To: Magnus Damm <magnus.damm@gmail.com> Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven <geert+renesas@glider.be> Subject: [PATCH 2/3] arm64: dts: renesas: r8a779h0: Add SCIF nodes Date: Tue, 12 Mar 2024 10:02:35 +0100 [thread overview] Message-ID: <1285062a78f8ec810d2c93366c2c9dc1f883683f.1709741303.git.geert+renesas@glider.be> (raw) In-Reply-To: <cover.1709741303.git.geert+renesas@glider.be> Add device nodes for the Serial Communication Interfaces with FIFO (SCIF) on the Renesas R-Car V4M (R8A779H0) SoC, including DMA support. Based on a patch in the BSP by Nghia Nguyen. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- Changes compared to the BSP: - Change reg size from 0x64 to 64, - Change "scif_clk2" to "scif_clk" in clock-names for SCIF4, - Add DMA properies. --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 68 +++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 4bad906bf2cb155b..3a40b56c4dcf113c 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -614,6 +614,74 @@ avb2: ethernet@e6820000 { status = "disabled"; }; + scif0: serial@e6e60000 { + compatible = "renesas,scif-r8a779h0", + "renesas,rcar-gen4-scif", "renesas,scif"; + reg = <0 0xe6e60000 0 64>; + interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 702>, + <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 702>; + dmas = <&dmac1 0x51>, <&dmac1 0x50>, + <&dmac2 0x51>, <&dmac2 0x50>; + dma-names = "tx", "rx", "tx", "rx"; + status = "disabled"; + }; + + scif1: serial@e6e68000 { + compatible = "renesas,scif-r8a779h0", + "renesas,rcar-gen4-scif", "renesas,scif"; + reg = <0 0xe6e68000 0 64>; + interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>, + <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 703>; + dmas = <&dmac1 0x53>, <&dmac1 0x52>, + <&dmac2 0x53>, <&dmac2 0x52>; + dma-names = "tx", "rx", "tx", "rx"; + status = "disabled"; + }; + + scif3: serial@e6c50000 { + compatible = "renesas,scif-r8a779h0", + "renesas,rcar-gen4-scif", "renesas,scif"; + reg = <0 0xe6c50000 0 64>; + interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 704>, + <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 704>; + dmas = <&dmac1 0x57>, <&dmac1 0x56>, + <&dmac2 0x57>, <&dmac2 0x56>; + dma-names = "tx", "rx", "tx", "rx"; + status = "disabled"; + }; + + scif4: serial@e6c40000 { + compatible = "renesas,scif-r8a779h0", + "renesas,rcar-gen4-scif", "renesas,scif"; + reg = <0 0xe6c40000 0 64>; + interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 705>, + <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, + <&scif_clk2>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 705>; + dmas = <&dmac1 0x59>, <&dmac1 0x58>, + <&dmac2 0x59>, <&dmac2 0x58>; + dma-names = "tx", "rx", "tx", "rx"; + status = "disabled"; + }; + dmac1: dma-controller@e7350000 { compatible = "renesas,dmac-r8a779h0", "renesas,rcar-gen4-dmac"; -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert+renesas@glider.be> To: Magnus Damm <magnus.damm@gmail.com> Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven <geert+renesas@glider.be> Subject: [PATCH 2/3] arm64: dts: renesas: r8a779h0: Add SCIF nodes Date: Tue, 12 Mar 2024 10:02:35 +0100 [thread overview] Message-ID: <1285062a78f8ec810d2c93366c2c9dc1f883683f.1709741303.git.geert+renesas@glider.be> (raw) In-Reply-To: <cover.1709741303.git.geert+renesas@glider.be> Add device nodes for the Serial Communication Interfaces with FIFO (SCIF) on the Renesas R-Car V4M (R8A779H0) SoC, including DMA support. Based on a patch in the BSP by Nghia Nguyen. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- Changes compared to the BSP: - Change reg size from 0x64 to 64, - Change "scif_clk2" to "scif_clk" in clock-names for SCIF4, - Add DMA properies. --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 68 +++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 4bad906bf2cb155b..3a40b56c4dcf113c 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -614,6 +614,74 @@ avb2: ethernet@e6820000 { status = "disabled"; }; + scif0: serial@e6e60000 { + compatible = "renesas,scif-r8a779h0", + "renesas,rcar-gen4-scif", "renesas,scif"; + reg = <0 0xe6e60000 0 64>; + interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 702>, + <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 702>; + dmas = <&dmac1 0x51>, <&dmac1 0x50>, + <&dmac2 0x51>, <&dmac2 0x50>; + dma-names = "tx", "rx", "tx", "rx"; + status = "disabled"; + }; + + scif1: serial@e6e68000 { + compatible = "renesas,scif-r8a779h0", + "renesas,rcar-gen4-scif", "renesas,scif"; + reg = <0 0xe6e68000 0 64>; + interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>, + <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 703>; + dmas = <&dmac1 0x53>, <&dmac1 0x52>, + <&dmac2 0x53>, <&dmac2 0x52>; + dma-names = "tx", "rx", "tx", "rx"; + status = "disabled"; + }; + + scif3: serial@e6c50000 { + compatible = "renesas,scif-r8a779h0", + "renesas,rcar-gen4-scif", "renesas,scif"; + reg = <0 0xe6c50000 0 64>; + interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 704>, + <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 704>; + dmas = <&dmac1 0x57>, <&dmac1 0x56>, + <&dmac2 0x57>, <&dmac2 0x56>; + dma-names = "tx", "rx", "tx", "rx"; + status = "disabled"; + }; + + scif4: serial@e6c40000 { + compatible = "renesas,scif-r8a779h0", + "renesas,rcar-gen4-scif", "renesas,scif"; + reg = <0 0xe6c40000 0 64>; + interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 705>, + <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, + <&scif_clk2>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; + resets = <&cpg 705>; + dmas = <&dmac1 0x59>, <&dmac1 0x58>, + <&dmac2 0x59>, <&dmac2 0x58>; + dma-names = "tx", "rx", "tx", "rx"; + status = "disabled"; + }; + dmac1: dma-controller@e7350000 { compatible = "renesas,dmac-r8a779h0", "renesas,rcar-gen4-dmac"; -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-03-12 9:02 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-12 9:02 [PATCH 0/3] arm64: dts: renesas: r8a779h0/gray-hawk-single: Add remaining serial ports Geert Uytterhoeven 2024-03-12 9:02 ` Geert Uytterhoeven 2024-03-12 9:02 ` [PATCH 1/3] arm64: dts: renesas: r8a779h0: Add remaining HSCIF nodes Geert Uytterhoeven 2024-03-12 9:02 ` Geert Uytterhoeven 2024-03-12 9:02 ` Geert Uytterhoeven [this message] 2024-03-12 9:02 ` [PATCH 2/3] arm64: dts: renesas: r8a779h0: Add SCIF nodes Geert Uytterhoeven 2024-03-12 9:02 ` [PATCH 3/3] arm64: dts: renesas: gray-hawk-single: Add second debug serial port Geert Uytterhoeven 2024-03-12 9:02 ` Geert Uytterhoeven 2024-03-12 14:33 ` [PATCH 0/3] arm64: dts: renesas: r8a779h0/gray-hawk-single: Add remaining serial ports Rob Herring 2024-03-12 14:33 ` Rob Herring
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